BEGIN 1781485248.3335357 EXEC /__w/rockrel/rockrel/build/emulation/rocjitsu/build /usr/local/therock-tools/bin/cmake -E env --unset=ROCM_PATH --unset=ROCM_DIR --unset=HIP_PATH --unset=HIP_DIR -- /usr/local/therock-tools/bin/ctest --output-on-failure --no-tests=error 0.0 Test project /__w/rockrel/rockrel/build/emulation/rocjitsu/build 0.0 Start 1: RvSimTest.ArithmeticAndMemory 0.0 1/770 Test #1: RvSimTest.ArithmeticAndMemory ........................................................................................................................................................................................................................................................................ Passed 0.01 sec 0.0 Start 2: RvSimTest.BranchAndJump 0.0 2/770 Test #2: RvSimTest.BranchAndJump .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 0.0 Start 3: RvSimTest.JalAndJalr 0.0 3/770 Test #3: RvSimTest.JalAndJalr ................................................................................................................................................................................................................................................................................. Passed 0.00 sec 0.0 Start 4: RvSimTest.ShiftsAndLogic 0.0 4/770 Test #4: RvSimTest.ShiftsAndLogic ............................................................................................................................................................................................................................................................................. Passed 0.00 sec 0.0 Start 5: GpuMemoryTest.ReadWriteRoundTrip 0.1 5/770 Test #5: GpuMemoryTest.ReadWriteRoundTrip ..................................................................................................................................................................................................................................................................... Passed 0.01 sec 0.1 Start 6: GpuMemoryTest.LoadImage 0.1 6/770 Test #6: GpuMemoryTest.LoadImage .............................................................................................................................................................................................................................................................................. Passed 0.01 sec 0.1 Start 7: GpuMemoryTest.SparsePages 0.1 7/770 Test #7: GpuMemoryTest.SparsePages ............................................................................................................................................................................................................................................................................ Passed 0.01 sec 0.1 Start 8: VmLifecycleTest.CreateAndDestroy 0.1 8/770 Test #8: VmLifecycleTest.CreateAndDestroy ..................................................................................................................................................................................................................................................................... Passed 0.01 sec 0.1 Start 9: VmLifecycleTest.MissingArchFails 0.1 9/770 Test #9: VmLifecycleTest.MissingArchFails ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 0.1 Start 10: VmLifecycleTest.InvalidArchFails 0.1 10/770 Test #10: VmLifecycleTest.InvalidArchFails ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 0.1 Start 11: AtomicStressTest.DsAddRtnU32_MultiWavefront 0.1 11/770 Test #11: AtomicStressTest.DsAddRtnU32_MultiWavefront .......................................................................................................................................................................................................................................................... Passed 0.01 sec 0.1 Start 12: AtomicStressTest.DsAddRtnU32_MultiWorkgroup 0.1 12/770 Test #12: AtomicStressTest.DsAddRtnU32_MultiWorkgroup .......................................................................................................................................................................................................................................................... Passed 0.01 sec 0.1 Start 13: AtomicStressTest.DsAddU32_NoReturn 0.1 13/770 Test #13: AtomicStressTest.DsAddU32_NoReturn ................................................................................................................................................................................................................................................................... Passed 0.01 sec 0.1 Start 14: AtomicStressTest.GlobalAtomicAdd_L2 0.1 14/770 Test #14: AtomicStressTest.GlobalAtomicAdd_L2 .................................................................................................................................................................................................................................................................. Passed 0.01 sec 0.1 Start 15: AtomicStressTest.GlobalAtomicAdd_MultiWorkgroup 0.1 15/770 Test #15: AtomicStressTest.GlobalAtomicAdd_MultiWorkgroup ...................................................................................................................................................................................................................................................... Passed 0.01 sec 0.1 Start 16: DsTransposeTest.ReadB64TrB16_AccBit 0.1 16/770 Test #16: DsTransposeTest.ReadB64TrB16_AccBit .................................................................................................................................................................................................................................................................. Passed 0.01 sec 0.1 Start 17: ConfigLoaderTest.LoadCdna4Config 0.6 17/770 Test #17: ConfigLoaderTest.LoadCdna4Config ..................................................................................................................................................................................................................................................................... Passed 0.46 sec 0.6 Start 18: ConfigLoaderTest.BuildFromJsonString 0.6 18/770 Test #18: ConfigLoaderTest.BuildFromJsonString ................................................................................................................................................................................................................................................................. Passed 0.02 sec 0.6 Start 19: ConfigLoaderTest.Gfx1250ComputeUnitDefaultsCoverTtmpAndHighVgprs 0.6 19/770 Test #19: ConfigLoaderTest.Gfx1250ComputeUnitDefaultsCoverTtmpAndHighVgprs ..................................................................................................................................................................................................................................... Passed 0.01 sec 0.6 Start 20: ConfigLoaderTest.DispatchDistributesAcrossCUs 0.6 20/770 Test #20: ConfigLoaderTest.DispatchDistributesAcrossCUs ........................................................................................................................................................................................................................................................ Passed 0.01 sec 0.6 Start 21: CheckpointTest.SaveAndRestoreMemory 0.6 21/770 Test #21: CheckpointTest.SaveAndRestoreMemory .................................................................................................................................................................................................................................................................. Passed 0.01 sec 0.6 Start 22: CheckpointTest.SaveAndRestoreAccVgprs 0.7 22/770 Test #22: CheckpointTest.SaveAndRestoreAccVgprs ................................................................................................................................................................................................................................................................ Passed 0.01 sec 0.7 Start 23: CApiTest.CreateAndDestroyFromString 0.7 23/770 Test #23: CApiTest.CreateAndDestroyFromString .................................................................................................................................................................................................................................................................. Passed 0.01 sec 0.7 Start 24: CApiTest.InvalidArguments 0.7 24/770 Test #24: CApiTest.InvalidArguments ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 0.7 Start 25: Gfx1250ConfigTest.ConfigLoadsTopology 1.4 25/770 Test #25: Gfx1250ConfigTest.ConfigLoadsTopology ................................................................................................................................................................................................................................................................ Passed 0.70 sec 1.4 Start 26: Gfx1250SdmaTest.PollMem64WaitsForFull64BitCondition 2.1 26/770 Test #26: Gfx1250SdmaTest.PollMem64WaitsForFull64BitCondition .................................................................................................................................................................................................................................................. Passed 0.71 sec 2.1 Start 27: Gfx1250SdmaTest.Fence64WritesFull64BitValue 2.8 27/770 Test #27: Gfx1250SdmaTest.Fence64WritesFull64BitValue .......................................................................................................................................................................................................................................................... Passed 0.72 sec 2.8 Start 28: Gfx1250ExecutionTest.DivScaleWritesExplicitSdstMask 3.5 28/770 Test #28: Gfx1250ExecutionTest.DivScaleWritesExplicitSdstMask .................................................................................................................................................................................................................................................. Passed 0.72 sec 3.5 Start 29: Gfx1250ExecutionTest.TensorDmaD2CopiesGlobalAndLds 4.2 29/770 Test #29: Gfx1250ExecutionTest.TensorDmaD2CopiesGlobalAndLds ................................................................................................................................................................................................................................................... Passed 0.71 sec 4.2 Start 30: Gfx1250ExecutionTest.TensorDmaLoadAppliesLdsPadding 4.9 30/770 Test #30: Gfx1250ExecutionTest.TensorDmaLoadAppliesLdsPadding .................................................................................................................................................................................................................................................. Passed 0.72 sec 4.9 Start 31: Gfx1250ExecutionTest.TensorDmaByteLoadUsesDwordPaddingUnits 5.7 31/770 Test #31: Gfx1250ExecutionTest.TensorDmaByteLoadUsesDwordPaddingUnits .......................................................................................................................................................................................................................................... Passed 0.71 sec 5.7 Start 32: Gfx1250ExecutionTest.TensorDmaPaddedStoreIsRejected 6.4 32/770 Test #32: Gfx1250ExecutionTest.TensorDmaPaddedStoreIsRejected .................................................................................................................................................................................................................................................. Passed 0.71 sec 6.4 Start 33: Gfx1250ExecutionTest.TensorDmaIterateCopiesMultipleTiles 7.1 33/770 Test #33: Gfx1250ExecutionTest.TensorDmaIterateCopiesMultipleTiles ............................................................................................................................................................................................................................................. Passed 0.72 sec 7.1 Start 34: Gfx1250ExecutionTest.TensorDmaAtomicBarrierArrivesAfterCopy 7.8 34/770 Test #34: Gfx1250ExecutionTest.TensorDmaAtomicBarrierArrivesAfterCopy .......................................................................................................................................................................................................................................... Passed 0.71 sec 7.8 Start 35: Gfx1250ExecutionTest.TensorDmaDenseDescriptorCopiesDenseRows 8.5 35/770 Test #35: Gfx1250ExecutionTest.TensorDmaDenseDescriptorCopiesDenseRows ......................................................................................................................................................................................................................................... Passed 0.72 sec 8.5 Start 36: Gfx1250ExecutionTest.TensorDmaGatherSupportsI32Indices 9.2 36/770 Test #36: Gfx1250ExecutionTest.TensorDmaGatherSupportsI32Indices ............................................................................................................................................................................................................................................... Passed 0.71 sec 9.2 Start 37: Gfx1250ExecutionTest.TensorDmaGatherSupportsI16Indices 9.9 37/770 Test #37: Gfx1250ExecutionTest.TensorDmaGatherSupportsI16Indices ............................................................................................................................................................................................................................................... Passed 0.71 sec 9.9 Start 38: Gfx1250CodeObjectTest.MachineFlagMapsToTarget 9.9 38/770 Test #38: Gfx1250CodeObjectTest.MachineFlagMapsToTarget ........................................................................................................................................................................................................................................................ Passed 0.00 sec 9.9 Start 39: Gfx1250CodeObjectTest.LlvmMcObjectMapsToTarget 10.0 39/770 Test #39: Gfx1250CodeObjectTest.LlvmMcObjectMapsToTarget .......................................................................................................................................................................................................................................................***Skipped 0.00 sec 10.0 Start 40: Gfx1250DecodeTest.SMovB64Literal64ConsumesThreeDwords 10.0 40/770 Test #40: Gfx1250DecodeTest.SMovB64Literal64ConsumesThreeDwords ................................................................................................................................................................................................................................................ Passed 0.00 sec 10.0 Start 41: Gfx1250DecodeTest.Vop3LiteralConsumesThreeDwords 10.0 41/770 Test #41: Gfx1250DecodeTest.Vop3LiteralConsumesThreeDwords ..................................................................................................................................................................................................................................................... Passed 0.00 sec 10.0 Start 42: Gfx1250DecodeTest.Vop3SdstLiteralConsumesThreeDwords 10.0 42/770 Test #42: Gfx1250DecodeTest.Vop3SdstLiteralConsumesThreeDwords ................................................................................................................................................................................................................................................. Passed 0.00 sec 10.0 Start 43: Gfx1250DecodeTest.SWaitXcntHasWaitcntMetadata 10.0 43/770 Test #43: Gfx1250DecodeTest.SWaitXcntHasWaitcntMetadata ........................................................................................................................................................................................................................................................ Passed 0.00 sec 10.0 Start 44: Gfx1250DecodeTest.BufferOffenUsesSingleVaddrRegister 10.0 44/770 Test #44: Gfx1250DecodeTest.BufferOffenUsesSingleVaddrRegister ................................................................................................................................................................................................................................................. Passed 0.00 sec 10.0 Start 45: Gfx1250DecodeTest.BufferWithoutIdxenOffenDoesNotExposeVaddrRegister 10.0 45/770 Test #45: Gfx1250DecodeTest.BufferWithoutIdxenOffenDoesNotExposeVaddrRegister .................................................................................................................................................................................................................................. Passed 0.00 sec 10.0 Start 46: Gfx1250DecodeTest.WmmaF8f6f4UsesMatrixFormatOperandWidths 10.0 46/770 Test #46: Gfx1250DecodeTest.WmmaF8f6f4UsesMatrixFormatOperandWidths ............................................................................................................................................................................................................................................ Passed 0.00 sec 10.0 Start 47: Gfx1250DecodeTest.WmmaScaleF8f6f4ConsumesVop3px2Pair 10.0 47/770 Test #47: Gfx1250DecodeTest.WmmaScaleF8f6f4ConsumesVop3px2Pair ................................................................................................................................................................................................................................................. Passed 0.00 sec 10.0 Start 48: Gfx1250DecodeTest.SwmmacPrintsIndexKeyAndReuseModifiers 10.0 48/770 Test #48: Gfx1250DecodeTest.SwmmacPrintsIndexKeyAndReuseModifiers .............................................................................................................................................................................................................................................. Passed 0.00 sec 10.0 Start 49: Gfx1250DecodeTest.VopdXyConsumesTwoDwords 10.0 49/770 Test #49: Gfx1250DecodeTest.VopdXyConsumesTwoDwords ............................................................................................................................................................................................................................................................ Passed 0.00 sec 10.0 Start 50: Gfx1250DecodeTest.Vopd3ConsumesThreeDwords 10.0 50/770 Test #50: Gfx1250DecodeTest.Vopd3ConsumesThreeDwords ........................................................................................................................................................................................................................................................... Passed 0.00 sec 10.0 Start 51: Gfx1250DecodeTest.VopdLiteralConsumesThreeDwords 10.0 51/770 Test #51: Gfx1250DecodeTest.VopdLiteralConsumesThreeDwords ..................................................................................................................................................................................................................................................... Passed 0.00 sec 10.0 Start 52: Gfx1250DecodeTest.VopdSourceOperandsFollowPrintedSlots 10.0 52/770 Test #52: Gfx1250DecodeTest.VopdSourceOperandsFollowPrintedSlots ............................................................................................................................................................................................................................................... Passed 0.00 sec 10.0 Start 53: Gfx1250SimulationTest.DispatchesEndpgmThroughConfig 10.7 53/770 Test #53: Gfx1250SimulationTest.DispatchesEndpgmThroughConfig .................................................................................................................................................................................................................................................. Passed 0.70 sec 10.7 Start 54: Gfx1250SimulationTest.MultiWaveDispatchPacksWorkitemIdsInV0 11.4 54/770 Test #54: Gfx1250SimulationTest.MultiWaveDispatchPacksWorkitemIdsInV0 .......................................................................................................................................................................................................................................... Passed 0.72 sec 11.4 Start 55: Gfx1250SimulationTest.DispatchPreloadsKernargDwordsIntoUserSgprs 12.2 55/770 Test #55: Gfx1250SimulationTest.DispatchPreloadsKernargDwordsIntoUserSgprs ..................................................................................................................................................................................................................................... Passed 0.73 sec 12.2 Start 56: Gfx1250SimulationTest.DispatchPreloadsKernargWhenDescriptorSizeIsUnknown 12.9 56/770 Test #56: Gfx1250SimulationTest.DispatchPreloadsKernargWhenDescriptorSizeIsUnknown ............................................................................................................................................................................................................................. Passed 0.71 sec 12.9 Start 57: Gfx1250SimulationTest.SLoadB32ScalesImmediateOffset 13.6 57/770 Test #57: Gfx1250SimulationTest.SLoadB32ScalesImmediateOffset .................................................................................................................................................................................................................................................. Passed 0.71 sec 13.6 Start 58: Gfx1250SimulationTest.TtmpWorkgroupIdsUseGridCoordinatesFor2DDispatch 14.3 58/770 Test #58: Gfx1250SimulationTest.TtmpWorkgroupIdsUseGridCoordinatesFor2DDispatch ................................................................................................................................................................................................................................ Passed 0.72 sec 14.3 Start 59: Gfx1250SimulationTest.SGetPcI64ReturnsNextInstructionAddress 15.0 59/770 Test #59: Gfx1250SimulationTest.SGetPcI64ReturnsNextInstructionAddress ......................................................................................................................................................................................................................................... Passed 0.72 sec 15.0 Start 60: Gfx1250SimulationTest.SAddPcI64SkipsRelativeToNextPc 15.7 60/770 Test #60: Gfx1250SimulationTest.SAddPcI64SkipsRelativeToNextPc ................................................................................................................................................................................................................................................. Passed 0.72 sec 15.7 Start 61: Gfx1250SimulationTest.SSetPcI64JumpsToScalarAddress 16.4 61/770 Test #61: Gfx1250SimulationTest.SSetPcI64JumpsToScalarAddress .................................................................................................................................................................................................................................................. Passed 0.71 sec 16.4 Start 62: Gfx1250SimulationTest.SSwapPcI64StoresReturnAddressAndJumps 17.2 62/770 Test #62: Gfx1250SimulationTest.SSwapPcI64StoresReturnAddressAndJumps .......................................................................................................................................................................................................................................... Passed 0.71 sec 17.2 Start 63: Gfx1250SimulationTest.SBitreplicateB64B32DuplicatesEachSourceBit 17.9 63/770 Test #63: Gfx1250SimulationTest.SBitreplicateB64B32DuplicatesEachSourceBit ..................................................................................................................................................................................................................................... Passed 0.72 sec 17.9 Start 64: Gfx1250SimulationTest.SGetShaderCyclesU64ReadsSimulationTime 18.6 64/770 Test #64: Gfx1250SimulationTest.SGetShaderCyclesU64ReadsSimulationTime ......................................................................................................................................................................................................................................... Passed 0.72 sec 18.6 Start 65: Gfx1250SimulationTest.SSendmsgRtnB64ReadsRealtimeAndB32UsesPlaceholder 19.3 65/770 Test #65: Gfx1250SimulationTest.SSendmsgRtnB64ReadsRealtimeAndB32UsesPlaceholder ............................................................................................................................................................................................................................... Passed 0.72 sec 19.3 Start 66: Gfx1250SimulationTest.SMovrelsReadsM0IndexedScalarSources 20.0 66/770 Test #66: Gfx1250SimulationTest.SMovrelsReadsM0IndexedScalarSources ............................................................................................................................................................................................................................................ Passed 0.72 sec 20.0 Start 67: Gfx1250SimulationTest.SMovreldWritesM0IndexedScalarDestinations 20.8 67/770 Test #67: Gfx1250SimulationTest.SMovreldWritesM0IndexedScalarDestinations ...................................................................................................................................................................................................................................... Passed 0.72 sec 20.8 Start 68: Gfx1250SimulationTest.SMovrelsd2B32UsesSeparatePackedM0Offsets 21.5 68/770 Test #68: Gfx1250SimulationTest.SMovrelsd2B32UsesSeparatePackedM0Offsets ....................................................................................................................................................................................................................................... Passed 0.71 sec 21.5 Start 69: Gfx1250SimulationTest.SplitNamedBarrierOpsReportIdleState 22.2 69/770 Test #69: Gfx1250SimulationTest.SplitNamedBarrierOpsReportIdleState ............................................................................................................................................................................................................................................ Passed 0.72 sec 22.2 Start 70: Gfx1250SimulationTest.VgprMsbModeTracksModeRegisterLayout 22.9 70/770 Test #70: Gfx1250SimulationTest.VgprMsbModeTracksModeRegisterLayout ............................................................................................................................................................................................................................................ Passed 0.73 sec 22.9 Start 71: Gfx1250SimulationTest.SSetVgprMsbUpdatesWavefrontMode 23.6 71/770 Test #71: Gfx1250SimulationTest.SSetVgprMsbUpdatesWavefrontMode ................................................................................................................................................................................................................................................ Passed 0.71 sec 23.6 Start 72: Gfx1250SimulationTest.VgprMsbRolesSelectHighVgprBanks 24.4 72/770 Test #72: Gfx1250SimulationTest.VgprMsbRolesSelectHighVgprBanks ................................................................................................................................................................................................................................................ Passed 0.73 sec 24.4 Start 73: Gfx1250SimulationTest.VMovrelsReadsM0RelativeVgpr 25.1 73/770 Test #73: Gfx1250SimulationTest.VMovrelsReadsM0RelativeVgpr .................................................................................................................................................................................................................................................... Passed 0.70 sec 25.1 Start 74: Gfx1250SimulationTest.VopdMulDx9ZeroOverridesNanProducts 25.8 74/770 Test #74: Gfx1250SimulationTest.VopdMulDx9ZeroOverridesNanProducts ............................................................................................................................................................................................................................................. Passed 0.71 sec 25.8 Start 75: Gfx1250SimulationTest.VopdFmaUsesSingleRounding 26.5 75/770 Test #75: Gfx1250SimulationTest.VopdFmaUsesSingleRounding ...................................................................................................................................................................................................................................................... Passed 0.70 sec 26.5 Start 76: Gfx1250SimulationTest.VopdFmacUsesDestinationAccumulator 27.2 76/770 Test #76: Gfx1250SimulationTest.VopdFmacUsesDestinationAccumulator ............................................................................................................................................................................................................................................. Passed 0.71 sec 27.2 Start 77: Gfx1250SimulationTest.GlobalStoreWritesVisibleMemory 27.9 77/770 Test #77: Gfx1250SimulationTest.GlobalStoreWritesVisibleMemory ................................................................................................................................................................................................................................................. Passed 0.72 sec 27.9 Start 78: Gfx1250SimulationTest.BufferStoreUsesM0Soffset 28.6 78/770 Test #78: Gfx1250SimulationTest.BufferStoreUsesM0Soffset ....................................................................................................................................................................................................................................................... Passed 0.72 sec 28.6 Start 79: Gfx1250RealKernelTest.VectorAddLoadsAndDecodes 28.6 79/770 Test #79: Gfx1250RealKernelTest.VectorAddLoadsAndDecodes .......................................................................................................................................................................................................................................................***Skipped 0.00 sec 28.6 Start 80: Gfx1250RealKernelTest.MatmulNaiveLoadsAndDecodes 28.6 80/770 Test #80: Gfx1250RealKernelTest.MatmulNaiveLoadsAndDecodes .....................................................................................................................................................................................................................................................***Skipped 0.00 sec 28.6 Start 81: Gfx1250RealKernelTest.VectorAddExecutesGolden 28.7 81/770 Test #81: Gfx1250RealKernelTest.VectorAddExecutesGolden ........................................................................................................................................................................................................................................................***Skipped 0.01 sec 28.7 Start 82: Gfx1250RealKernelTest.MatmulNaiveExecutesGolden 28.7 82/770 Test #82: Gfx1250RealKernelTest.MatmulNaiveExecutesGolden ......................................................................................................................................................................................................................................................***Skipped 0.00 sec 28.7 Start 83: PacingControllerTest.DisabledIsNoop 28.7 83/770 Test #83: PacingControllerTest.DisabledIsNoop .................................................................................................................................................................................................................................................................. Passed 0.00 sec 28.7 Start 84: PacingControllerTest.StateTransitions 28.7 84/770 Test #84: PacingControllerTest.StateTransitions ................................................................................................................................................................................................................................................................ Passed 0.00 sec 28.7 Start 85: PacingControllerTest.StepThresholdResetsAnchor 28.7 85/770 Test #85: PacingControllerTest.StepThresholdResetsAnchor ....................................................................................................................................................................................................................................................... Passed 0.00 sec 28.7 Start 86: PacingControllerTest.PauseResumeNoDrift 28.8 86/770 Test #86: PacingControllerTest.PauseResumeNoDrift .............................................................................................................................................................................................................................................................. Passed 0.12 sec 28.8 Start 87: PacingControllerTest.SeqlockConcurrentReads 28.8 87/770 Test #87: PacingControllerTest.SeqlockConcurrentReads .......................................................................................................................................................................................................................................................... Passed 0.02 sec 28.8 Start 88: PacingControllerTest.TokenBucketAbsorbsBursts 28.8 88/770 Test #88: PacingControllerTest.TokenBucketAbsorbsBursts ........................................................................................................................................................................................................................................................ Passed 0.00 sec 28.8 Start 89: SpinlockTest.BasicLockUnlock 28.8 89/770 Test #89: SpinlockTest.BasicLockUnlock ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 28.8 Start 90: SpinlockTest.ConcurrentIncrement 29.0 90/770 Test #90: SpinlockTest.ConcurrentIncrement ..................................................................................................................................................................................................................................................................... Passed 0.19 sec 29.0 Start 91: SpinlockTest.CrossPartitionQueueHighContention 29.1 91/770 Test #91: SpinlockTest.CrossPartitionQueueHighContention ....................................................................................................................................................................................................................................................... Passed 0.06 sec 29.1 Start 92: SpinlockTest.CrossPartitionQueueEmptyDrain 29.1 92/770 Test #92: SpinlockTest.CrossPartitionQueueEmptyDrain ........................................................................................................................................................................................................................................................... Passed 0.00 sec 29.1 Start 93: TerminationTest.QuiescenceDetection 29.1 93/770 Test #93: TerminationTest.QuiescenceDetection .................................................................................................................................................................................................................................................................. Passed 0.00 sec 29.1 Start 94: TerminationTest.AllPrimaryDoneTrigger 29.1 94/770 Test #94: TerminationTest.AllPrimaryDoneTrigger ................................................................................................................................................................................................................................................................ Passed 0.00 sec 29.1 Start 95: TerminationTest.MaxTicksSentinel 29.1 95/770 Test #95: TerminationTest.MaxTicksSentinel ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 29.1 Start 96: TerminationTest.RequestExitWakesAllPartitions 29.1 96/770 Test #96: TerminationTest.RequestExitWakesAllPartitions ........................................................................................................................................................................................................................................................ Passed 0.05 sec 29.1 Start 97: TerminationTest.StepModeConsistency 29.2 97/770 Test #97: TerminationTest.StepModeConsistency .................................................................................................................................................................................................................................................................. Passed 0.00 sec 29.2 Start 98: LBTSTest.TwoPartitionPingPong 29.2 98/770 Test #98: LBTSTest.TwoPartitionPingPong ........................................................................................................................................................................................................................................................................ Passed 0.00 sec 29.2 Start 99: LBTSTest.IdlePartitionDoesNotBlock 29.2 99/770 Test #99: LBTSTest.IdlePartitionDoesNotBlock ................................................................................................................................................................................................................................................................... Passed 0.00 sec 29.2 Start 100: LBTSTest.TimestampAdvancesEnableProgress 29.2 100/770 Test #100: LBTSTest.TimestampAdvancesEnableProgress ............................................................................................................................................................................................................................................................. Passed 0.00 sec 29.2 Start 101: CrossPartitionTest.MessageDelivery 29.2 101/770 Test #101: CrossPartitionTest.MessageDelivery ................................................................................................................................................................................................................................................................... Passed 0.00 sec 29.2 Start 102: CrossPartitionTest.LinkLatencyAdded 29.2 102/770 Test #102: CrossPartitionTest.LinkLatencyAdded .................................................................................................................................................................................................................................................................. Passed 0.00 sec 29.2 Start 103: AsyncCausalityTest.ScheduleEventNowProducesReasonableTimestamp 29.2 103/770 Test #103: AsyncCausalityTest.ScheduleEventNowProducesReasonableTimestamp ....................................................................................................................................................................................................................................... Passed 0.00 sec 29.2 Start 104: StressTest.FourPartitionRingStress 29.2 104/770 Test #104: StressTest.FourPartitionRingStress ................................................................................................................................................................................................................................................................... Passed 0.00 sec 29.2 Start 105: StressTest.LongRunningThousandsOfEvents 29.2 105/770 Test #105: StressTest.LongRunningThousandsOfEvents .............................................................................................................................................................................................................................................................. Passed 0.00 sec 29.2 Start 106: StressTest.AsyncInjectionDuringActiveSimulation 29.2 106/770 Test #106: StressTest.AsyncInjectionDuringActiveSimulation ...................................................................................................................................................................................................................................................... Passed 0.00 sec 29.2 Start 107: SimulatedDriverTest.CreateDefault 29.7 107/770 Test #107: SimulatedDriverTest.CreateDefault .................................................................................................................................................................................................................................................................... Passed 0.48 sec 29.7 Start 108: SimulatedDriverTest.OpenAndClose 30.1 108/770 Test #108: SimulatedDriverTest.OpenAndClose ..................................................................................................................................................................................................................................................................... Passed 0.48 sec 30.1 Start 109: SimulatedDriverTest.TopologyDirectoryExists 30.6 109/770 Test #109: SimulatedDriverTest.TopologyDirectoryExists .......................................................................................................................................................................................................................................................... Passed 0.47 sec 30.6 Start 110: CodeArchApiTest.PreservesExistingPublicEnumValues 30.6 110/770 Test #110: CodeArchApiTest.PreservesExistingPublicEnumValues .................................................................................................................................................................................................................................................... Passed 0.00 sec 30.6 Start 111: UtilBitTest.IsAlignedChecksPowerOfTwoAlignment 30.6 111/770 Test #111: UtilBitTest.IsAlignedChecksPowerOfTwoAlignment ....................................................................................................................................................................................................................................................... Passed 0.00 sec 30.6 Start 112: MfmaExecTest.InputLocF32_32x32 30.6 112/770 Test #112: MfmaExecTest.InputLocF32_32x32 ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.6 Start 113: MfmaExecTest.InputLocF16_16x16 30.6 113/770 Test #113: MfmaExecTest.InputLocF16_16x16 ....................................................................................................................................................................................................................................................................... Passed 0.01 sec 30.6 Start 114: MfmaExecTest.OutputLoc32_4x4 30.6 114/770 Test #114: MfmaExecTest.OutputLoc32_4x4 ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.6 Start 115: MfmaExecTest.ResolveAccConstant 30.7 115/770 Test #115: MfmaExecTest.ResolveAccConstant ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 116: MfmaExecTest.ResolveAccVgpr 30.7 116/770 Test #116: MfmaExecTest.ResolveAccVgpr .......................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 117: MfmaExecTest.ResolveAccAccVgpr 30.7 117/770 Test #117: MfmaExecTest.ResolveAccAccVgpr ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 118: CuFactoryTest.CdnaAccVgprsDoNotAliasNextWaveSlot 30.7 118/770 Test #118: CuFactoryTest.CdnaAccVgprsDoNotAliasNextWaveSlot ..................................................................................................................................................................................................................................................... Passed 0.01 sec 30.7 Start 119: CuFactoryTest.CdnaAccVgprsAreClearedOnRedispatch 30.7 119/770 Test #119: CuFactoryTest.CdnaAccVgprsAreClearedOnRedispatch ..................................................................................................................................................................................................................................................... Passed 0.01 sec 30.7 Start 120: DppPermuteTest.QuadPerm 30.7 120/770 Test #120: DppPermuteTest.QuadPerm .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 30.7 Start 121: DppPermuteTest.RowShr1 30.7 121/770 Test #121: DppPermuteTest.RowShr1 ............................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 122: DppPermuteTest.RowShl1 30.7 122/770 Test #122: DppPermuteTest.RowShl1 ............................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 123: DppPermuteTest.RowMirror 30.7 123/770 Test #123: DppPermuteTest.RowMirror ............................................................................................................................................................................................................................................................................. Passed 0.00 sec 30.7 Start 124: DppPermuteTest.RowXmask 30.7 124/770 Test #124: DppPermuteTest.RowXmask .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 30.7 Start 125: DppPermuteTest.DppRead 30.7 125/770 Test #125: DppPermuteTest.DppRead ............................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 126: SdwaTest.SrcSelect 30.7 126/770 Test #126: SdwaTest.SrcSelect ................................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 127: SdwaTest.DstMerge 30.7 127/770 Test #127: SdwaTest.DstMerge .................................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 128: ScratchAddrCalcTest.FlatScratchUsesWavefrontBase 30.7 128/770 Test #128: ScratchAddrCalcTest.FlatScratchUsesWavefrontBase ..................................................................................................................................................................................................................................................... Passed 0.01 sec 30.7 Start 129: ScratchAddrCalcTest.FlatGlobalDoesNotUseScratchBase 30.7 129/770 Test #129: ScratchAddrCalcTest.FlatGlobalDoesNotUseScratchBase .................................................................................................................................................................................................................................................. Passed 0.01 sec 30.7 Start 130: TranscendentalTest.RcpF32SpecialCases 30.7 130/770 Test #130: TranscendentalTest.RcpF32SpecialCases ................................................................................................................................................................................................................................................................ Passed 0.00 sec 30.7 Start 131: TranscendentalTest.RsqF32SpecialCases 30.7 131/770 Test #131: TranscendentalTest.RsqF32SpecialCases ................................................................................................................................................................................................................................................................ Passed 0.00 sec 30.7 Start 132: TranscendentalTest.SqrtF32SpecialCases 30.7 132/770 Test #132: TranscendentalTest.SqrtF32SpecialCases ............................................................................................................................................................................................................................................................... Passed 0.00 sec 30.7 Start 133: TranscendentalTest.LogF32SpecialCases 30.7 133/770 Test #133: TranscendentalTest.LogF32SpecialCases ................................................................................................................................................................................................................................................................ Passed 0.00 sec 30.7 Start 134: TranscendentalTest.ExpF32SpecialCases 30.7 134/770 Test #134: TranscendentalTest.ExpF32SpecialCases ................................................................................................................................................................................................................................................................ Passed 0.00 sec 30.7 Start 135: TranscendentalTest.SinCosF32SpecialCases 30.7 135/770 Test #135: TranscendentalTest.SinCosF32SpecialCases ............................................................................................................................................................................................................................................................. Passed 0.00 sec 30.7 Start 136: TranscendentalTest.RcpF64SpecialCases 30.8 136/770 Test #136: TranscendentalTest.RcpF64SpecialCases ................................................................................................................................................................................................................................................................ Passed 0.00 sec 30.8 Start 137: TranscendentalTest.SqrtF64SpecialCases 30.8 137/770 Test #137: TranscendentalTest.SqrtF64SpecialCases ............................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 138: TranscendentalTest.RcpF32Ulp 30.8 138/770 Test #138: TranscendentalTest.RcpF32Ulp ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 139: TranscendentalTest.SqrtF32Ulp 30.8 139/770 Test #139: TranscendentalTest.SqrtF32Ulp ........................................................................................................................................................................................................................................................................ Passed 0.00 sec 30.8 Start 140: RegisterSetAnalysis.KeepsRegisterClassesSeparate 30.8 140/770 Test #140: RegisterSetAnalysis.KeepsRegisterClassesSeparate ..................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 141: RegisterSetAnalysis.IgnoresSpecialRegisterClasses 30.8 141/770 Test #141: RegisterSetAnalysis.IgnoresSpecialRegisterClasses .................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 142: RegisterSetAnalysis.GeneratedCdna4OperandsMapTrackedRegisterRefs 30.8 142/770 Test #142: RegisterSetAnalysis.GeneratedCdna4OperandsMapTrackedRegisterRefs ..................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 143: CfgAnalysis.LoopBackEdgeLinksPredecessor 30.8 143/770 Test #143: CfgAnalysis.LoopBackEdgeLinksPredecessor ............................................................................................................................................................................................................................................................. Passed 0.00 sec 30.8 Start 144: CfgAnalysis.IfElseSuccessorsAndPredecessorsAreInverse 30.8 144/770 Test #144: CfgAnalysis.IfElseSuccessorsAndPredecessorsAreInverse ................................................................................................................................................................................................................................................ Passed 0.00 sec 30.8 Start 145: CfgAnalysis.ExtraLeaderSplitsBlockAtKernelEntry 30.8 145/770 Test #145: CfgAnalysis.ExtraLeaderSplitsBlockAtKernelEntry ...................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 146: CfgAnalysis.IndirectCallFallsThroughToReturnSuccessor 30.8 146/770 Test #146: CfgAnalysis.IndirectCallFallsThroughToReturnSuccessor ................................................................................................................................................................................................................................................ Passed 0.00 sec 30.8 Start 147: CfgAnalysis.IndirectBranchHasNoStaticSuccessor 30.8 147/770 Test #147: CfgAnalysis.IndirectBranchHasNoStaticSuccessor ....................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 148: CfgAnalysis.ReversePostOrderStraightLine 30.8 148/770 Test #148: CfgAnalysis.ReversePostOrderStraightLine ............................................................................................................................................................................................................................................................. Passed 0.00 sec 30.8 Start 149: CfgAnalysis.ReversePostOrderIfElseDiamond 30.8 149/770 Test #149: CfgAnalysis.ReversePostOrderIfElseDiamond ............................................................................................................................................................................................................................................................ Passed 0.00 sec 30.8 Start 150: CfgAnalysis.ReversePostOrderChangedOrder 30.8 150/770 Test #150: CfgAnalysis.ReversePostOrderChangedOrder ............................................................................................................................................................................................................................................................. Passed 0.00 sec 30.8 Start 151: CfgAnalysis.ReversePostOrderSelfLoop 30.8 151/770 Test #151: CfgAnalysis.ReversePostOrderSelfLoop ................................................................................................................................................................................................................................................................. Passed 0.00 sec 30.8 Start 152: LivenessAnalysis.ExecMaskedVgprDefDoesNotKillInactiveLaneValue 30.8 152/770 Test #152: LivenessAnalysis.ExecMaskedVgprDefDoesNotKillInactiveLaneValue ....................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 153: LivenessAnalysis.FindsDeadSgprAfterLiveSgpr 30.8 153/770 Test #153: LivenessAnalysis.FindsDeadSgprAfterLiveSgpr .......................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 154: LivenessAnalysis.FindValidSgprPair 30.8 154/770 Test #154: LivenessAnalysis.FindValidSgprPair ................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 155: LivenessAnalysis.FindSgprPairSkipsStraddle 30.8 155/770 Test #155: LivenessAnalysis.FindSgprPairSkipsStraddle ........................................................................................................................................................................................................................................................... Passed 0.00 sec 30.8 Start 156: LivenessAnalysis.NoSgprPairAvailable 30.8 156/770 Test #156: LivenessAnalysis.NoSgprPairAvailable ................................................................................................................................................................................................................................................................. Passed 0.00 sec 30.8 Start 157: LivenessAnalysis.MinFreeVgprForcesScratchAllocationAboveFloor 30.8 157/770 Test #157: LivenessAnalysis.MinFreeVgprForcesScratchAllocationAboveFloor ........................................................................................................................................................................................................................................ Passed 0.00 sec 30.8 Start 158: LivenessAnalysis.ReadWriteSameRegisterIsLiveBeforeInstruction 30.8 158/770 Test #158: LivenessAnalysis.ReadWriteSameRegisterIsLiveBeforeInstruction ........................................................................................................................................................................................................................................ Passed 0.00 sec 30.8 Start 159: LivenessAnalysis.ReadWriteRegisterStaysLiveOutWhenUsedBySuccessor 30.9 159/770 Test #159: LivenessAnalysis.ReadWriteRegisterStaysLiveOutWhenUsedBySuccessor .................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 160: LivenessAnalysis.ImplicitUseIsLiveBeforeInstruction 30.9 160/770 Test #160: LivenessAnalysis.ImplicitUseIsLiveBeforeInstruction .................................................................................................................................................................................................................................................. Passed 0.00 sec 30.9 Start 161: LivenessAnalysis.PredicatedScalarDefDoesNotKillLiveOutValue 30.9 161/770 Test #161: LivenessAnalysis.PredicatedScalarDefDoesNotKillLiveOutValue .......................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 162: LivenessAnalysis.LoopCarriedUseRevisitsBackEdgePredecessor 30.9 162/770 Test #162: LivenessAnalysis.LoopCarriedUseRevisitsBackEdgePredecessor ........................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 163: LivenessAnalysis.BranchMeetKeepsValueLiveWhenOneSuccessorPreservesIt 30.9 163/770 Test #163: LivenessAnalysis.BranchMeetKeepsValueLiveWhenOneSuccessorPreservesIt ................................................................................................................................................................................................................................. Passed 0.00 sec 30.9 Start 164: LivenessAnalysis.ExplicitBlockSubsetIgnoresOutsideSuccessors 30.9 164/770 Test #164: LivenessAnalysis.ExplicitBlockSubsetIgnoresOutsideSuccessors ......................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 165: InstDefUse.DstOnlyVgpr 30.9 165/770 Test #165: InstDefUse.DstOnlyVgpr ............................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 166: InstDefUse.SrcOnlySgpr 30.9 166/770 Test #166: InstDefUse.SrcOnlySgpr ............................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 167: InstDefUse.RWSgpr 30.9 167/770 Test #167: InstDefUse.RWSgpr .................................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 168: InstDefUse.Predicated 30.9 168/770 Test #168: InstDefUse.Predicated ................................................................................................................................................................................................................................................................................ Passed 0.00 sec 30.9 Start 169: SpillManager.BaseOffsetIsRoundedUpTo16 30.9 169/770 Test #169: SpillManager.BaseOffsetIsRoundedUpTo16 ............................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 170: SpillManager.AllocateSgprReturnsAscendingOffsets 30.9 170/770 Test #170: SpillManager.AllocateSgprReturnsAscendingOffsets ..................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 171: SpillManager.AllocateIsIdempotentForSameRegister 30.9 171/770 Test #171: SpillManager.AllocateIsIdempotentForSameRegister ..................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 172: SpillManager.OffsetForReturnsNulloptForUnknown 30.9 172/770 Test #172: SpillManager.OffsetForReturnsNulloptForUnknown ....................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 173: SpillManager.OffsetForReturnsAllocatedOffset 30.9 173/770 Test #173: SpillManager.OffsetForReturnsAllocatedOffset ......................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 174: SpillManager.AllocateSlotsReturnsContiguousOffsets 30.9 174/770 Test #174: SpillManager.AllocateSlotsReturnsContiguousOffsets ................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 175: SpillManager.AllocateSlotsThenSingleSlotInterleaves 30.9 175/770 Test #175: SpillManager.AllocateSlotsThenSingleSlotInterleaves .................................................................................................................................................................................................................................................. Passed 0.00 sec 30.9 Start 176: SpillManager.AllocateSlotsIsIdempotent 30.9 176/770 Test #176: SpillManager.AllocateSlotsIsIdempotent ............................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 177: SpillManager.TestSyntheticSet 30.9 177/770 Test #177: SpillManager.TestSyntheticSet ........................................................................................................................................................................................................................................................................ Passed 0.00 sec 30.9 Start 178: SpillManager.VgprSlotIsFourBytesNotWaveSizeTimesFour 30.9 178/770 Test #178: SpillManager.VgprSlotIsFourBytesNotWaveSizeTimesFour ................................................................................................................................................................................................................................................. Passed 0.00 sec 30.9 Start 179: SpillManager.AccVgprAndVgprSameIndexHaveDistinctSlots 30.9 179/770 Test #179: SpillManager.AccVgprAndVgprSameIndexHaveDistinctSlots ................................................................................................................................................................................................................................................ Passed 0.00 sec 30.9 Start 180: SpillManager.AccVgprIs4Bytes 30.9 180/770 Test #180: SpillManager.AccVgprIs4Bytes ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 181: SpillManager.SlotAddressMatchesFlatScratchFormula 30.9 181/770 Test #181: SpillManager.SlotAddressMatchesFlatScratchFormula .................................................................................................................................................................................................................................................... Passed 0.00 sec 30.9 Start 182: SpillManager.ReserveSet_AddsAllRegisters 30.9 182/770 Test #182: SpillManager.ReserveSet_AddsAllRegisters ............................................................................................................................................................................................................................................................. Passed 0.00 sec 31.0 Start 183: SpillManager.ReserveSet_IsIdempotent 31.0 183/770 Test #183: SpillManager.ReserveSet_IsIdempotent ................................................................................................................................................................................................................................................................. Passed 0.00 sec 31.0 Start 184: SpillManager.ReserveSet_HandlesEmpty 31.0 184/770 Test #184: SpillManager.ReserveSet_HandlesEmpty ................................................................................................................................................................................................................................................................. Passed 0.00 sec 31.0 Start 185: SpillManager.AllocateSlotReturnsNulloptOnOverflow 31.0 185/770 Test #185: SpillManager.AllocateSlotReturnsNulloptOnOverflow .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 186: SpillManager.AllocateSlotsRollsBackOnPartialOverflow 31.0 186/770 Test #186: SpillManager.AllocateSlotsRollsBackOnPartialOverflow ................................................................................................................................................................................................................................................. Passed 0.00 sec 31.0 Start 187: SpillManager.ReserveRollsBackOnOverflow 31.0 187/770 Test #187: SpillManager.ReserveRollsBackOnOverflow .............................................................................................................................................................................................................................................................. Passed 0.00 sec 31.0 Start 188: SpillManager.LimitBoundaryFitsExactly 31.0 188/770 Test #188: SpillManager.LimitBoundaryFitsExactly ................................................................................................................................................................................................................................................................ Passed 0.00 sec 31.0 Start 189: SpillManager.IdempotentReallocationUnderTightLimit 31.0 189/770 Test #189: SpillManager.IdempotentReallocationUnderTightLimit ................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 190: SpillManager.AllocateSlotsWidth1EqualsAllocateSlot 31.0 190/770 Test #190: SpillManager.AllocateSlotsWidth1EqualsAllocateSlot ................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 191: SpillManager.AllocateSlotsWidth0ReturnsNullopt 31.0 191/770 Test #191: SpillManager.AllocateSlotsWidth0ReturnsNullopt ....................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 192: SpillManager.AllocateSlotsRejectsIndexOverflow 31.0 192/770 Test #192: SpillManager.AllocateSlotsRejectsIndexOverflow ....................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 193: SpillManager.AllocateSlotsRejectsPerClassOverflow 31.0 193/770 Test #193: SpillManager.AllocateSlotsRejectsPerClassOverflow .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 194: SpillManager.ReserveSet_PartialOverlap 31.0 194/770 Test #194: SpillManager.ReserveSet_PartialOverlap ............................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 195: SpillManager.ConstructorOverLimitFailsAllAllocations 31.0 195/770 Test #195: SpillManager.ConstructorOverLimitFailsAllAllocations ................................................................................................................................................................................................................................................. Passed 0.00 sec 31.0 Start 196: SpillManager.IntegrationFromLiveBefore 31.0 196/770 Test #196: SpillManager.IntegrationFromLiveBefore ............................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 197: CoherencyRemap.Gfx940ToGfx12AgentScope 31.0 197/770 Test #197: CoherencyRemap.Gfx940ToGfx12AgentScope ............................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 198: CoherencyRemap.Gfx940ToGfx12SystemScope 31.0 198/770 Test #198: CoherencyRemap.Gfx940ToGfx12SystemScope .............................................................................................................................................................................................................................................................. Passed 0.00 sec 31.0 Start 199: CoherencyRemap.Gfx940ToGfx12NonTemporal 31.0 199/770 Test #199: CoherencyRemap.Gfx940ToGfx12NonTemporal .............................................................................................................................................................................................................................................................. Passed 0.00 sec 31.0 Start 200: CoherencyRemap.Gfx9GlcToGfx12 31.0 200/770 Test #200: CoherencyRemap.Gfx9GlcToGfx12 ........................................................................................................................................................................................................................................................................ Passed 0.00 sec 31.0 Start 201: EncodingTranslator.Sop1PreservesRegisters 31.0 201/770 Test #201: EncodingTranslator.Sop1PreservesRegisters ............................................................................................................................................................................................................................................................ Passed 0.00 sec 31.0 Start 202: EncodingTranslator.Sop2PreservesRegisters 31.0 202/770 Test #202: EncodingTranslator.Sop2PreservesRegisters ............................................................................................................................................................................................................................................................ Passed 0.00 sec 31.0 Start 203: EncodingTranslator.SoppPreservesSimm16 31.0 203/770 Test #203: EncodingTranslator.SoppPreservesSimm16 ............................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 204: EncodingTranslator.SmemRemapsCoherency 31.0 204/770 Test #204: EncodingTranslator.SmemRemapsCoherency ............................................................................................................................................................................................................................................................... Passed 0.00 sec 31.0 Start 205: EncodingTranslator.Vop3PreservesModifiers 31.0 205/770 Test #205: EncodingTranslator.Vop3PreservesModifiers ............................................................................................................................................................................................................................................................ Passed 0.00 sec 31.0 Start 206: EncodingTranslator.Cdna4ToCdna3Vop2VectorAddPreservesOperands 31.1 206/770 Test #206: EncodingTranslator.Cdna4ToCdna3Vop2VectorAddPreservesOperands ........................................................................................................................................................................................................................................ Passed 0.00 sec 31.1 Start 207: EncodingTranslator.UnknownEncodingReturnsEmpty 31.1 207/770 Test #207: EncodingTranslator.UnknownEncodingReturnsEmpty ....................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 208: EncodingTranslator.DecodeEncodeRoundTrip 31.1 208/770 Test #208: EncodingTranslator.DecodeEncodeRoundTrip ............................................................................................................................................................................................................................................................. Passed 0.00 sec 31.1 Start 209: InstructionBuilder.Sop2SetsEncodingPrefix 31.1 209/770 Test #209: InstructionBuilder.Sop2SetsEncodingPrefix ............................................................................................................................................................................................................................................................ Passed 0.00 sec 31.1 Start 210: LegalizationLookup.FindsKnownInstruction 31.1 210/770 Test #210: LegalizationLookup.FindsKnownInstruction ............................................................................................................................................................................................................................................................. Passed 0.00 sec 31.1 Start 211: LegalizationLookup.ReturnsNullForUnknown 31.1 211/770 Test #211: LegalizationLookup.ReturnsNullForUnknown ............................................................................................................................................................................................................................................................. Passed 0.00 sec 31.1 Start 212: LegalizationTable.NoIllegalEntries_Cdna4ToRdna4 31.1 212/770 Test #212: LegalizationTable.NoIllegalEntries_Cdna4ToRdna4 ...................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 213: LegalizationTable.NoIllegalEntries_cdna1_to_cdna2 31.1 213/770 Test #213: LegalizationTable.NoIllegalEntries_cdna1_to_cdna2 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 214: LegalizationTable.NoIllegalEntries_cdna1_to_cdna3 31.1 214/770 Test #214: LegalizationTable.NoIllegalEntries_cdna1_to_cdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 215: LegalizationTable.NoIllegalEntries_cdna1_to_cdna4 31.1 215/770 Test #215: LegalizationTable.NoIllegalEntries_cdna1_to_cdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 216: LegalizationTable.NoIllegalEntries_cdna1_to_rdna1 31.1 216/770 Test #216: LegalizationTable.NoIllegalEntries_cdna1_to_rdna1 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 217: LegalizationTable.NoIllegalEntries_cdna1_to_rdna2 31.1 217/770 Test #217: LegalizationTable.NoIllegalEntries_cdna1_to_rdna2 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 218: LegalizationTable.NoIllegalEntries_cdna1_to_rdna3 31.1 218/770 Test #218: LegalizationTable.NoIllegalEntries_cdna1_to_rdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 219: LegalizationTable.NoIllegalEntries_cdna1_to_rdna4 31.1 219/770 Test #219: LegalizationTable.NoIllegalEntries_cdna1_to_rdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 220: LegalizationTable.NoIllegalEntries_cdna2_to_cdna3 31.1 220/770 Test #220: LegalizationTable.NoIllegalEntries_cdna2_to_cdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 221: LegalizationTable.NoIllegalEntries_cdna2_to_cdna4 31.1 221/770 Test #221: LegalizationTable.NoIllegalEntries_cdna2_to_cdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 222: LegalizationTable.NoIllegalEntries_cdna2_to_rdna3 31.1 222/770 Test #222: LegalizationTable.NoIllegalEntries_cdna2_to_rdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 223: LegalizationTable.NoIllegalEntries_cdna2_to_rdna4 31.1 223/770 Test #223: LegalizationTable.NoIllegalEntries_cdna2_to_rdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 224: LegalizationTable.NoIllegalEntries_cdna3_to_cdna4 31.1 224/770 Test #224: LegalizationTable.NoIllegalEntries_cdna3_to_cdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 225: LegalizationTable.NoIllegalEntries_cdna3_to_rdna3 31.1 225/770 Test #225: LegalizationTable.NoIllegalEntries_cdna3_to_rdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 226: LegalizationTable.NoIllegalEntries_cdna3_to_rdna4 31.1 226/770 Test #226: LegalizationTable.NoIllegalEntries_cdna3_to_rdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 227: LegalizationTable.NoIllegalEntries_cdna4_to_cdna3 31.1 227/770 Test #227: LegalizationTable.NoIllegalEntries_cdna4_to_cdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 228: LegalizationTable.NoIllegalEntries_cdna4_to_rdna3 31.1 228/770 Test #228: LegalizationTable.NoIllegalEntries_cdna4_to_rdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 229: LegalizationTable.NoIllegalEntries_rdna1_to_cdna3 31.1 229/770 Test #229: LegalizationTable.NoIllegalEntries_rdna1_to_cdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.1 Start 230: LegalizationTable.NoIllegalEntries_rdna1_to_cdna4 31.2 230/770 Test #230: LegalizationTable.NoIllegalEntries_rdna1_to_cdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 231: LegalizationTable.NoIllegalEntries_rdna1_to_rdna2 31.2 231/770 Test #231: LegalizationTable.NoIllegalEntries_rdna1_to_rdna2 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 232: LegalizationTable.NoIllegalEntries_rdna1_to_rdna3 31.2 232/770 Test #232: LegalizationTable.NoIllegalEntries_rdna1_to_rdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 233: LegalizationTable.NoIllegalEntries_rdna1_to_rdna4 31.2 233/770 Test #233: LegalizationTable.NoIllegalEntries_rdna1_to_rdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 234: LegalizationTable.NoIllegalEntries_rdna2_to_rdna3 31.2 234/770 Test #234: LegalizationTable.NoIllegalEntries_rdna2_to_rdna3 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 235: LegalizationTable.NoIllegalEntries_rdna2_to_rdna4 31.2 235/770 Test #235: LegalizationTable.NoIllegalEntries_rdna2_to_rdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 236: LegalizationTable.NoIllegalEntries_rdna3_5_to_rdna4 31.2 236/770 Test #236: LegalizationTable.NoIllegalEntries_rdna3_5_to_rdna4 .................................................................................................................................................................................................................................................. Passed 0.00 sec 31.2 Start 237: LegalizationTable.NoIllegalEntries_rdna3_to_cdna4 31.2 237/770 Test #237: LegalizationTable.NoIllegalEntries_rdna3_to_cdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 238: LegalizationTable.NoIllegalEntries_rdna3_to_rdna4 31.2 238/770 Test #238: LegalizationTable.NoIllegalEntries_rdna3_to_rdna4 .................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 239: LegalizationTable.NoIllegalEntries_rdna4_to_cdna4 31.2 239/770 Test #239: LegalizationTable.NoIllegalEntries_rdna4_to_cdna4 .................................................................................................................................................................................................................................................... Passed 0.01 sec 31.2 Start 240: CodeObjectPatcher.CaveBodyMaterializesInRjTranslationsAfterText 31.2 240/770 Test #240: CodeObjectPatcher.CaveBodyMaterializesInRjTranslationsAfterText ...................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 241: CodeObjectPatcher.CaveInsertionPreservesLoadSegmentAlignment 31.2 241/770 Test #241: CodeObjectPatcher.CaveInsertionPreservesLoadSegmentAlignment ......................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 242: CodeObjectPatcher.CaveInsertionPreservesMovedKernelDescriptorEntryAddress 31.2 242/770 Test #242: CodeObjectPatcher.CaveInsertionPreservesMovedKernelDescriptorEntryAddress ............................................................................................................................................................................................................................ Passed 0.00 sec 31.2 Start 243: CodeObjectPatcher.CaveInsertionUpdatesRelocationOffsetsIntoMovedSections 31.2 243/770 Test #243: CodeObjectPatcher.CaveInsertionUpdatesRelocationOffsetsIntoMovedSections ............................................................................................................................................................................................................................. Passed 0.00 sec 31.2 Start 244: BinaryTranslator.CaveBranchOverflowLeavesCodeObjectUnchanged 31.2 244/770 Test #244: BinaryTranslator.CaveBranchOverflowLeavesCodeObjectUnchanged ......................................................................................................................................................................................................................................... Passed 0.02 sec 31.2 Start 245: WaitcntTranslator.DecodeVmcnt0 31.2 245/770 Test #245: WaitcntTranslator.DecodeVmcnt0 ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 246: WaitcntTranslator.DecodeAllRelaxed 31.2 246/770 Test #246: WaitcntTranslator.DecodeAllRelaxed ................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.2 Start 247: WaitcntTranslator.DecodeVmcnt15Lgkm0 31.2 247/770 Test #247: WaitcntTranslator.DecodeVmcnt15Lgkm0 ................................................................................................................................................................................................................................................................. Passed 0.00 sec 31.2 Start 248: WaitcntTranslator.EncodeAllZeroProducesMultipleWords 31.2 248/770 Test #248: WaitcntTranslator.EncodeAllZeroProducesMultipleWords ................................................................................................................................................................................................................................................. Passed 0.00 sec 31.2 Start 249: WaitcntTranslator.EncodeAllRelaxedProducesNop 31.3 249/770 Test #249: WaitcntTranslator.EncodeAllRelaxedProducesNop ........................................................................................................................................................................................................................................................ Passed 0.00 sec 31.3 Start 250: WaitcntTranslator.EncodeVmcnt0EmitsLoadcntAndStorecnt 31.3 250/770 Test #250: WaitcntTranslator.EncodeVmcnt0EmitsLoadcntAndStorecnt ................................................................................................................................................................................................................................................ Passed 0.00 sec 31.3 Start 251: BinaryTranslatorE2E.TranslatesMultiKernelCodeObject 31.3 251/770 Test #251: BinaryTranslatorE2E.TranslatesMultiKernelCodeObject .................................................................................................................................................................................................................................................. Passed 0.00 sec 31.3 Start 252: BinaryTranslatorE2E.Cdna4ToCdna3SemanticExpandRulesHaveTranslationFixtures 31.3 252/770 Test #252: BinaryTranslatorE2E.Cdna4ToCdna3SemanticExpandRulesHaveTranslationFixtures ........................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 253: BinaryTranslatorE2E.Cdna4ToCdna3Bitop3ScratchGrowsDescriptor 31.3 253/770 Test #253: BinaryTranslatorE2E.Cdna4ToCdna3Bitop3ScratchGrowsDescriptor ......................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 254: BinaryTranslatorE2E.Cdna4ToCdna3MfmaPartialScratchGrowsDescriptor 31.3 254/770 Test #254: BinaryTranslatorE2E.Cdna4ToCdna3MfmaPartialScratchGrowsDescriptor .................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 255: BinaryTranslatorE2E.ExpandLegalizationWithoutSemanticRuleFails 31.3 255/770 Test #255: BinaryTranslatorE2E.ExpandLegalizationWithoutSemanticRuleFails ....................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 256: BinaryTranslatorE2E.DebugContinueAfterFailureCollectsMultipleExpandDiagnostics 31.3 256/770 Test #256: BinaryTranslatorE2E.DebugContinueAfterFailureCollectsMultipleExpandDiagnostics ....................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 257: BinaryTranslatorE2E.MatchedSemanticExpandRuleFailureIsDiagnostic 31.3 257/770 Test #257: BinaryTranslatorE2E.MatchedSemanticExpandRuleFailureIsDiagnostic ..................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 258: KernelDescriptorTranslator.IgnoresNonAllocExecutableSectionsForEntryRange 31.3 258/770 Test #258: KernelDescriptorTranslator.IgnoresNonAllocExecutableSectionsForEntryRange ............................................................................................................................................................................................................................ Passed 0.00 sec 31.3 Start 259: MtypeFlagsTest.Gfx9GlcOff 31.3 259/770 Test #259: MtypeFlagsTest.Gfx9GlcOff ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 31.3 Start 260: MtypeFlagsTest.Gfx9GlcOn 31.3 260/770 Test #260: MtypeFlagsTest.Gfx9GlcOn ............................................................................................................................................................................................................................................................................. Passed 0.00 sec 31.3 Start 261: MtypeFlagsTest.Gfx940WaveScope 31.3 261/770 Test #261: MtypeFlagsTest.Gfx940WaveScope ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 262: MtypeFlagsTest.Gfx940DeviceScope 31.3 262/770 Test #262: MtypeFlagsTest.Gfx940DeviceScope ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 263: MtypeFlagsTest.Gfx940SystemScope 31.3 263/770 Test #263: MtypeFlagsTest.Gfx940SystemScope ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 264: MtypeFlagsTest.Gfx940SystemScopeBoth 31.3 264/770 Test #264: MtypeFlagsTest.Gfx940SystemScopeBoth ................................................................................................................................................................................................................................................................. Passed 0.00 sec 31.3 Start 265: MtypeFlagsTest.Gfx940NonTemporal 31.3 265/770 Test #265: MtypeFlagsTest.Gfx940NonTemporal ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 266: MtypeFlagsTest.Gfx940NtOverridesScope 31.3 266/770 Test #266: MtypeFlagsTest.Gfx940NtOverridesScope ................................................................................................................................................................................................................................................................ Passed 0.00 sec 31.3 Start 267: MtypeFlagsTest.Gfx10AllOff 31.3 267/770 Test #267: MtypeFlagsTest.Gfx10AllOff ........................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 268: MtypeFlagsTest.Gfx10GlcOnly 31.3 268/770 Test #268: MtypeFlagsTest.Gfx10GlcOnly .......................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 269: MtypeFlagsTest.Gfx10DlcOnly 31.3 269/770 Test #269: MtypeFlagsTest.Gfx10DlcOnly .......................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 270: MtypeFlagsTest.Gfx10GlcAndDlc 31.3 270/770 Test #270: MtypeFlagsTest.Gfx10GlcAndDlc ........................................................................................................................................................................................................................................................................ Passed 0.00 sec 31.3 Start 271: MtypeFlagsTest.Gfx10SlcNonTemporal 31.3 271/770 Test #271: MtypeFlagsTest.Gfx10SlcNonTemporal ................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.3 Start 272: MtypeFlagsTest.Gfx10SlcOverrides 31.4 272/770 Test #272: MtypeFlagsTest.Gfx10SlcOverrides ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 273: MtypeFlagsTest.Gfx11CuScope 31.4 273/770 Test #273: MtypeFlagsTest.Gfx11CuScope .......................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 274: MtypeFlagsTest.Gfx11DeviceScope 31.4 274/770 Test #274: MtypeFlagsTest.Gfx11DeviceScope ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 275: MtypeFlagsTest.Gfx11SystemScope 31.4 275/770 Test #275: MtypeFlagsTest.Gfx11SystemScope ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 276: MtypeFlagsTest.Gfx11NonTemporal 31.4 276/770 Test #276: MtypeFlagsTest.Gfx11NonTemporal ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 277: MtypeFlagsTest.Gfx11NtOverridesScope 31.4 277/770 Test #277: MtypeFlagsTest.Gfx11NtOverridesScope ................................................................................................................................................................................................................................................................. Passed 0.00 sec 31.4 Start 278: MtypeFlagsTest.Gfx12CuScope 31.4 278/770 Test #278: MtypeFlagsTest.Gfx12CuScope .......................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 279: MtypeFlagsTest.Gfx12SeScope 31.4 279/770 Test #279: MtypeFlagsTest.Gfx12SeScope .......................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 280: MtypeFlagsTest.Gfx12DeviceScope 31.4 280/770 Test #280: MtypeFlagsTest.Gfx12DeviceScope ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 281: MtypeFlagsTest.Gfx12SystemScope 31.4 281/770 Test #281: MtypeFlagsTest.Gfx12SystemScope ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 282: MtypeFlagsTest.Gfx12NonTemporal 31.4 282/770 Test #282: MtypeFlagsTest.Gfx12NonTemporal ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 283: MtypeFlagsTest.Gfx12NtOverridesScope 31.4 283/770 Test #283: MtypeFlagsTest.Gfx12NtOverridesScope ................................................................................................................................................................................................................................................................. Passed 0.00 sec 31.4 Start 284: MtypeFlagsTest.ScopeNtHelper 31.4 284/770 Test #284: MtypeFlagsTest.ScopeNtHelper ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 31.4 Start 285: KfdIoctlTest.SetMemoryPolicy 31.9 285/770 Test #285: KfdIoctlTest.SetMemoryPolicy ......................................................................................................................................................................................................................................................................... Passed 0.47 sec 31.9 Start 286: KfdIoctlTest.ImportDmabufAndQueryInfo 32.3 286/770 Test #286: KfdIoctlTest.ImportDmabufAndQueryInfo ................................................................................................................................................................................................................................................................ Passed 0.47 sec 32.3 Start 287: KfdIoctlTest.SvmSetAndGetAttributes 32.8 287/770 Test #287: KfdIoctlTest.SvmSetAndGetAttributes .................................................................................................................................................................................................................................................................. Passed 0.47 sec 32.8 Start 288: KfdIoctlTest.RuntimeEnableAndDisable 33.3 288/770 Test #288: KfdIoctlTest.RuntimeEnableAndDisable ................................................................................................................................................................................................................................................................. Passed 0.48 sec 33.3 Start 289: WaitCounterTest.IncrementVmcnt 33.3 289/770 Test #289: WaitCounterTest.IncrementVmcnt ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 290: WaitCounterTest.DecrementVmcnt 33.3 290/770 Test #290: WaitCounterTest.DecrementVmcnt ....................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.3 Start 291: WaitCounterTest.IncrementLgkmcnt 33.3 291/770 Test #291: WaitCounterTest.IncrementLgkmcnt ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 292: WaitCounterTest.IncrementExpcnt 33.3 292/770 Test #292: WaitCounterTest.IncrementExpcnt ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 293: WaitCounterTest.IncrementVscnt 33.3 293/770 Test #293: WaitCounterTest.IncrementVscnt ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 294: WaitCounterTest.IncrementStorecnt 33.3 294/770 Test #294: WaitCounterTest.IncrementStorecnt .................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 295: WaitCounterTest.IncrementLoadcnt 33.3 295/770 Test #295: WaitCounterTest.IncrementLoadcnt ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 296: WaitCounterTest.IncrementDscnt 33.3 296/770 Test #296: WaitCounterTest.IncrementDscnt ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 297: WaitCounterTest.IncrementKmcnt 33.3 297/770 Test #297: WaitCounterTest.IncrementKmcnt ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 298: WaitCounterTest.IncrementTensorcnt 33.3 298/770 Test #298: WaitCounterTest.IncrementTensorcnt ................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 299: WaitCounterTest.DecrementDscnt 33.3 299/770 Test #299: WaitCounterTest.DecrementDscnt ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.3 Start 300: WaitCounterTest.DecrementKmcnt 33.4 300/770 Test #300: WaitCounterTest.DecrementKmcnt ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.4 Start 301: WaitCounterTest.MixedDscntKmcnt 33.4 301/770 Test #301: WaitCounterTest.MixedDscntKmcnt ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.4 Start 302: WaitCounterTest.SaturationAtMax 33.4 302/770 Test #302: WaitCounterTest.SaturationAtMax ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.4 Start 303: WaitTargetTest.DefaultSatisfied 33.4 303/770 Test #303: WaitTargetTest.DefaultSatisfied ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.4 Start 304: WaitTargetTest.VmcntNotSatisfied 33.4 304/770 Test #304: WaitTargetTest.VmcntNotSatisfied ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.4 Start 305: WaitTargetTest.VmcntSatisfied 33.4 305/770 Test #305: WaitTargetTest.VmcntSatisfied ........................................................................................................................................................................................................................................................................ Passed 0.00 sec 33.4 Start 306: WaitTargetTest.DscntNotSatisfied 33.4 306/770 Test #306: WaitTargetTest.DscntNotSatisfied ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.4 Start 307: WaitTargetTest.TensorcntNotSatisfied 33.4 307/770 Test #307: WaitTargetTest.TensorcntNotSatisfied ................................................................................................................................................................................................................................................................. Passed 0.00 sec 33.4 Start 308: WaitTargetTest.MultipleCounters 33.4 308/770 Test #308: WaitTargetTest.MultipleCounters ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.4 Start 309: InstructionExecutionHarness.Cdna1 33.4 309/770 Test #309: InstructionExecutionHarness.Cdna1 .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.4 Start 310: InstructionExecutionHarness.Cdna2 33.4 310/770 Test #310: InstructionExecutionHarness.Cdna2 .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.4 Start 311: InstructionExecutionHarness.Cdna3 33.4 311/770 Test #311: InstructionExecutionHarness.Cdna3 .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.4 Start 312: InstructionExecutionHarness.Cdna4 33.4 312/770 Test #312: InstructionExecutionHarness.Cdna4 .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.4 Start 313: InstructionExecutionHarness.Rdna1 33.4 313/770 Test #313: InstructionExecutionHarness.Rdna1 .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.4 Start 314: InstructionExecutionHarness.Rdna2 33.4 314/770 Test #314: InstructionExecutionHarness.Rdna2 .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.4 Start 315: InstructionExecutionHarness.Rdna3 33.4 315/770 Test #315: InstructionExecutionHarness.Rdna3 .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.4 Start 316: InstructionExecutionHarness.Rdna3_5 33.4 316/770 Test #316: InstructionExecutionHarness.Rdna3_5 .................................................................................................................................................................................................................................................................. Passed 0.01 sec 33.4 Start 317: InstructionExecutionHarness.Rdna4 33.5 317/770 Test #317: InstructionExecutionHarness.Rdna4 .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.5 Start 318: InstructionExecutionHarness.Gfx1250 33.5 318/770 Test #318: InstructionExecutionHarness.Gfx1250 .................................................................................................................................................................................................................................................................. Passed 0.01 sec 33.5 Start 319: HwregTest.SetregImm32WritesStatus 33.5 319/770 Test #319: HwregTest.SetregImm32WritesStatus .................................................................................................................................................................................................................................................................... Passed 0.01 sec 33.5 Start 320: HwregTest.SetregImm32PartialBitfield 33.5 320/770 Test #320: HwregTest.SetregImm32PartialBitfield ................................................................................................................................................................................................................................................................. Passed 0.01 sec 33.5 Start 321: DecodeExecuteBenchmark.Cdna4 33.6 321/770 Test #321: DecodeExecuteBenchmark.Cdna4 ......................................................................................................................................................................................................................................................................... Passed 0.11 sec 33.6 Start 322: DecodeExecuteBenchmark.Rdna4 33.7 322/770 Test #322: DecodeExecuteBenchmark.Rdna4 ......................................................................................................................................................................................................................................................................... Passed 0.10 sec 33.7 Start 323: DecodeExecuteBenchmark.Gfx1250 33.8 323/770 Test #323: DecodeExecuteBenchmark.Gfx1250 ....................................................................................................................................................................................................................................................................... Passed 0.12 sec 33.8 Start 324: UtilSimd.Load_Contiguous_U32 33.8 324/770 Test #324: UtilSimd.Load_Contiguous_U32 ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.8 Start 325: UtilSimd.Load_Contiguous_F32 33.8 325/770 Test #325: UtilSimd.Load_Contiguous_F32 ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.8 Start 326: UtilSimd.Broadcast_U32 33.8 326/770 Test #326: UtilSimd.Broadcast_U32 ............................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.8 Start 327: UtilSimd.Broadcast_F32 33.8 327/770 Test #327: UtilSimd.Broadcast_F32 ............................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.8 Start 328: UtilSimd.MaskedStore_FullMask 33.8 328/770 Test #328: UtilSimd.MaskedStore_FullMask ........................................................................................................................................................................................................................................................................ Passed 0.00 sec 33.8 Start 329: UtilSimd.MaskedStore_PartialMask 33.8 329/770 Test #329: UtilSimd.MaskedStore_PartialMask ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.8 Start 330: UtilSimd.MaskedStore_EmptyMask 33.8 330/770 Test #330: UtilSimd.MaskedStore_EmptyMask ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.8 Start 331: UtilSimd.BlitToBuffer_F32 33.8 331/770 Test #331: UtilSimd.BlitToBuffer_F32 ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 33.8 Start 332: UtilSimd.LoadNarrow_RoundTrip_F32 33.8 332/770 Test #332: UtilSimd.LoadNarrow_RoundTrip_F32 .................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.8 Start 333: UtilSimd.BroadcastNarrow_I32 33.9 333/770 Test #333: UtilSimd.BroadcastNarrow_I32 ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 334: UtilSimd.MaskedStoreNarrow_FullAndPartial 33.9 334/770 Test #334: UtilSimd.MaskedStoreNarrow_FullAndPartial ............................................................................................................................................................................................................................................................ Passed 0.00 sec 33.9 Start 335: UtilSimd.NarrowBridgeCast_DoubleToFromB32 33.9 335/770 Test #335: UtilSimd.NarrowBridgeCast_DoubleToFromB32 ............................................................................................................................................................................................................................................................ Passed 0.00 sec 33.9 Start 336: UtilSimd.ForceScalar_ImmutableProcessWide 33.9 336/770 Test #336: UtilSimd.ForceScalar_ImmutableProcessWide ............................................................................................................................................................................................................................................................ Passed 0.00 sec 33.9 Start 337: UtilSimd.Exp2_VectorMatchesScalar_BitExact 33.9 337/770 Test #337: UtilSimd.Exp2_VectorMatchesScalar_BitExact ........................................................................................................................................................................................................................................................... Passed 0.01 sec 33.9 Start 338: UtilSimd.Log2_VectorMatchesScalar_BitExact 33.9 338/770 Test #338: UtilSimd.Log2_VectorMatchesScalar_BitExact ........................................................................................................................................................................................................................................................... Passed 0.01 sec 33.9 Start 339: UtilSimd.Fma_VectorMatchesScalar_BitExact 33.9 339/770 Test #339: UtilSimd.Fma_VectorMatchesScalar_BitExact ............................................................................................................................................................................................................................................................ Passed 0.01 sec 33.9 Start 340: UtilSimd.FmaF64_VectorMatchesScalar_BitExact 33.9 340/770 Test #340: UtilSimd.FmaF64_VectorMatchesScalar_BitExact ......................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 341: UtilSimd.CeilF64_VectorMatchesScalar_BitExact 33.9 341/770 Test #341: UtilSimd.CeilF64_VectorMatchesScalar_BitExact ........................................................................................................................................................................................................................................................ Passed 0.00 sec 33.9 Start 342: UtilSimd.FloorF64_VectorMatchesScalar_BitExact 33.9 342/770 Test #342: UtilSimd.FloorF64_VectorMatchesScalar_BitExact ....................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 343: UtilSimd.TruncF64_VectorMatchesScalar_BitExact 33.9 343/770 Test #343: UtilSimd.TruncF64_VectorMatchesScalar_BitExact ....................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 344: UtilSimd.RndneF64_VectorMatchesScalar_BitExact 33.9 344/770 Test #344: UtilSimd.RndneF64_VectorMatchesScalar_BitExact ....................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 345: UtilSimd.FractF64_VectorMatchesScalar_BitExact 33.9 345/770 Test #345: UtilSimd.FractF64_VectorMatchesScalar_BitExact ....................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 346: UtilSimd.RcpF64_VectorMatchesScalar_BitExact 33.9 346/770 Test #346: UtilSimd.RcpF64_VectorMatchesScalar_BitExact ......................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 347: UtilSimd.RsqF64_VectorMatchesScalar_BitExact 33.9 347/770 Test #347: UtilSimd.RsqF64_VectorMatchesScalar_BitExact ......................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 348: UtilSimd.SqrtF64_VectorMatchesScalar_BitExact 33.9 348/770 Test #348: UtilSimd.SqrtF64_VectorMatchesScalar_BitExact ........................................................................................................................................................................................................................................................ Passed 0.00 sec 33.9 Start 349: UtilSimd.Fmax_VectorMatchesScalar_BitExact 33.9 349/770 Test #349: UtilSimd.Fmax_VectorMatchesScalar_BitExact ........................................................................................................................................................................................................................................................... Passed 0.01 sec 33.9 Start 350: UtilSimd.Fmin_VectorMatchesScalar_BitExact 33.9 350/770 Test #350: UtilSimd.Fmin_VectorMatchesScalar_BitExact ........................................................................................................................................................................................................................................................... Passed 0.01 sec 33.9 Start 351: UtilSimd.F16ToF32_VectorMatchesScalar_Exhaustive 33.9 351/770 Test #351: UtilSimd.F16ToF32_VectorMatchesScalar_Exhaustive ..................................................................................................................................................................................................................................................... Passed 0.00 sec 33.9 Start 352: UtilSimd.F32ToF16_VectorMatchesScalar_Sweep 34.0 352/770 Test #352: UtilSimd.F32ToF16_VectorMatchesScalar_Sweep .......................................................................................................................................................................................................................................................... Passed 0.03 sec 34.0 Start 353: UtilSimd.FlushDenormF32 34.0 353/770 Test #353: UtilSimd.FlushDenormF32 .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 34.0 Start 354: VAddSimdBenchmark.Cdna4_VAddF32_Vop2 34.0 354/770 Test #354: VAddSimdBenchmark.Cdna4_VAddF32_Vop2 ................................................................................................................................................................................................................................................................. Passed 0.03 sec 34.0 Start 355: VAddSimdBenchmark.Cdna4_VAddU32_Vop2 34.0 355/770 Test #355: VAddSimdBenchmark.Cdna4_VAddU32_Vop2 ................................................................................................................................................................................................................................................................. Passed 0.03 sec 34.0 Start 356: VAddSimdBenchmark.Cdna4_VAddU16_Vop2 34.1 356/770 Test #356: VAddSimdBenchmark.Cdna4_VAddU16_Vop2 ................................................................................................................................................................................................................................................................. Passed 0.03 sec 34.1 Start 357: VAddSimdBenchmark.Cdna4_VAddF16_Vop2 34.2 357/770 Test #357: VAddSimdBenchmark.Cdna4_VAddF16_Vop2 ................................................................................................................................................................................................................................................................. Passed 0.12 sec 34.2 Start 358: VAddSimdBenchmark.Cdna4_VAddCoU32_Vop2 34.2 358/770 Test #358: VAddSimdBenchmark.Cdna4_VAddCoU32_Vop2 ............................................................................................................................................................................................................................................................... Passed 0.04 sec 34.2 Start 359: VAddSimdBenchmark.Cdna4_VFmaakF32_Vop2 34.3 359/770 Test #359: VAddSimdBenchmark.Cdna4_VFmaakF32_Vop2 ............................................................................................................................................................................................................................................................... Passed 0.06 sec 34.3 Start 360: VAddSimdBenchmark.Cdna4_VCndmaskB32_Vop2 34.3 360/770 Test #360: VAddSimdBenchmark.Cdna4_VCndmaskB32_Vop2 ............................................................................................................................................................................................................................................................. Passed 0.04 sec 34.3 Start 361: VAddSimdBenchmark.Cdna4_VMulHiU32U24_Vop2 34.4 361/770 Test #361: VAddSimdBenchmark.Cdna4_VMulHiU32U24_Vop2 ............................................................................................................................................................................................................................................................ Passed 0.04 sec 34.4 Start 362: VAddSimdBenchmark.Cdna4_VMaxF32_Vop2 34.4 362/770 Test #362: VAddSimdBenchmark.Cdna4_VMaxF32_Vop2 ................................................................................................................................................................................................................................................................. Passed 0.07 sec 34.4 Start 363: VAddSimdBenchmark.Cdna4_VLdexpF16_Vop2 34.6 363/770 Test #363: VAddSimdBenchmark.Cdna4_VLdexpF16_Vop2 ............................................................................................................................................................................................................................................................... Passed 0.20 sec 34.6 Start 364: VAddSimdBenchmark.Cdna4_VCeilF16_Vop1 34.7 364/770 Test #364: VAddSimdBenchmark.Cdna4_VCeilF16_Vop1 ................................................................................................................................................................................................................................................................ Passed 0.11 sec 34.7 Start 365: VAddSimdBenchmark.Cdna4_VCmpLtF64_Vopc 34.9 365/770 Test #365: VAddSimdBenchmark.Cdna4_VCmpLtF64_Vopc ............................................................................................................................................................................................................................................................... Passed 0.12 sec 34.9 Start 366: VAddSimdBenchmark.Cdna4_VCvtI32F64_Vop1 35.0 366/770 Test #366: VAddSimdBenchmark.Cdna4_VCvtI32F64_Vop1 .............................................................................................................................................................................................................................................................. Passed 0.09 sec 35.0 Start 367: VAddSimdBenchmark.Cdna4_VCvtF64I32_Vop1 35.0 367/770 Test #367: VAddSimdBenchmark.Cdna4_VCvtF64I32_Vop1 .............................................................................................................................................................................................................................................................. Passed 0.03 sec 35.0 Start 368: VAddSimdBenchmark.Cdna4_VCmpClassF32_Vopc 35.0 368/770 Test #368: VAddSimdBenchmark.Cdna4_VCmpClassF32_Vopc ............................................................................................................................................................................................................................................................ Passed 0.04 sec 35.0 Start 369: VAddSimdBenchmark.Cdna4_VCmpClassF64_Vopc 35.2 369/770 Test #369: VAddSimdBenchmark.Cdna4_VCmpClassF64_Vopc ............................................................................................................................................................................................................................................................ Passed 0.16 sec 35.2 Start 370: VAddSimdBenchmark.Cdna4_VCmpClassF32_Vop3 35.2 370/770 Test #370: VAddSimdBenchmark.Cdna4_VCmpClassF32_Vop3 ............................................................................................................................................................................................................................................................ Passed 0.04 sec 35.2 Start 371: VAddSimdBenchmark.Cdna4_VAddF32_Vop3 35.3 371/770 Test #371: VAddSimdBenchmark.Cdna4_VAddF32_Vop3 ................................................................................................................................................................................................................................................................. Passed 0.04 sec 35.3 Start 372: VAddSimdBenchmark.Cdna4_VAddF32_Vop3_Modifiers 35.3 372/770 Test #372: VAddSimdBenchmark.Cdna4_VAddF32_Vop3_Modifiers ....................................................................................................................................................................................................................................................... Passed 0.04 sec 35.3 Start 373: VAddSimdBenchmark.Cdna4_VMulF32_Vop3 35.4 373/770 Test #373: VAddSimdBenchmark.Cdna4_VMulF32_Vop3 ................................................................................................................................................................................................................................................................. Passed 0.04 sec 35.4 Start 374: VAddSimdBenchmark.Cdna4_VAndB32_Vop3 35.4 374/770 Test #374: VAddSimdBenchmark.Cdna4_VAndB32_Vop3 ................................................................................................................................................................................................................................................................. Passed 0.03 sec 35.4 Start 375: VAddSimdBenchmark.Cdna4_VAddU32_Vop3 35.4 375/770 Test #375: VAddSimdBenchmark.Cdna4_VAddU32_Vop3 ................................................................................................................................................................................................................................................................. Passed 0.03 sec 35.4 Start 376: VAddSimdBenchmark.Cdna4_VFloorF32_Vop3 35.4 376/770 Test #376: VAddSimdBenchmark.Cdna4_VFloorF32_Vop3 ............................................................................................................................................................................................................................................................... Passed 0.03 sec 35.4 Start 377: VAddSimdBenchmark.Cdna4_VFloorF32_Vop3_Modifiers 35.5 377/770 Test #377: VAddSimdBenchmark.Cdna4_VFloorF32_Vop3_Modifiers ..................................................................................................................................................................................................................................................... Passed 0.04 sec 35.5 Start 378: VAddSimdBenchmark.Cdna4_VCvtF32I32_Vop3 35.5 378/770 Test #378: VAddSimdBenchmark.Cdna4_VCvtF32I32_Vop3 .............................................................................................................................................................................................................................................................. Passed 0.02 sec 35.5 Start 379: VAddSimdBenchmark.Cdna4_VCmpLtI32_Vop3 35.5 379/770 Test #379: VAddSimdBenchmark.Cdna4_VCmpLtI32_Vop3 ............................................................................................................................................................................................................................................................... Passed 0.03 sec 35.5 Start 380: VAddSimdBenchmark.Cdna4_VCmpLtI64_Vop3 35.6 380/770 Test #380: VAddSimdBenchmark.Cdna4_VCmpLtI64_Vop3 ............................................................................................................................................................................................................................................................... Passed 0.08 sec 35.6 Start 381: VAddSimdBenchmark.Cdna4_VCmpEqF32_Vop3 35.6 381/770 Test #381: VAddSimdBenchmark.Cdna4_VCmpEqF32_Vop3 ............................................................................................................................................................................................................................................................... Passed 0.03 sec 35.6 Start 382: VAddSimdBenchmark.Cdna4_VCmpEqF32_Vop3_Modifiers 35.7 382/770 Test #382: VAddSimdBenchmark.Cdna4_VCmpEqF32_Vop3_Modifiers ..................................................................................................................................................................................................................................................... Passed 0.03 sec 35.7 Start 383: VAddSimdBenchmark.Cdna4_VCmpEqF16_Vop3 35.7 383/770 Test #383: VAddSimdBenchmark.Cdna4_VCmpEqF16_Vop3 ............................................................................................................................................................................................................................................................... Passed 0.07 sec 35.7 Start 384: VAddSimdBenchmark.Cdna4_VCmpEqF64_Vop3 35.9 384/770 Test #384: VAddSimdBenchmark.Cdna4_VCmpEqF64_Vop3 ............................................................................................................................................................................................................................................................... Passed 0.13 sec 35.9 Start 385: VAddSimdBenchmark.Cdna4_VAdd3U32_Vop3 35.9 385/770 Test #385: VAddSimdBenchmark.Cdna4_VAdd3U32_Vop3 ................................................................................................................................................................................................................................................................ Passed 0.03 sec 35.9 Start 386: VAddSimdBenchmark.Cdna4_VCvtI32F64_Vop3 36.0 386/770 Test #386: VAddSimdBenchmark.Cdna4_VCvtI32F64_Vop3 .............................................................................................................................................................................................................................................................. Passed 0.09 sec 36.0 Start 387: VAddSimdBenchmark.Cdna4_VAddF64_Vop3 36.1 387/770 Test #387: VAddSimdBenchmark.Cdna4_VAddF64_Vop3 ................................................................................................................................................................................................................................................................. Passed 0.13 sec 36.1 Start 388: VAddSimdBenchmark.Cdna4_VCeilF64_Vop3 36.3 388/770 Test #388: VAddSimdBenchmark.Cdna4_VCeilF64_Vop3 ................................................................................................................................................................................................................................................................ Passed 0.14 sec 36.3 Start 389: VAddSimdBenchmark.Cdna4_VCeilF16_Vop3 36.4 389/770 Test #389: VAddSimdBenchmark.Cdna4_VCeilF16_Vop3 ................................................................................................................................................................................................................................................................ Passed 0.11 sec 36.4 Start 390: VAddSimdBenchmark.Cdna4_VDivFmasF32_Vop3 36.5 390/770 Test #390: VAddSimdBenchmark.Cdna4_VDivFmasF32_Vop3 ............................................................................................................................................................................................................................................................. Passed 0.12 sec 36.5 Start 391: VAddSimdBenchmark.Cdna4_VCndmaskB32_Vop3 36.5 391/770 Test #391: VAddSimdBenchmark.Cdna4_VCndmaskB32_Vop3 ............................................................................................................................................................................................................................................................. Passed 0.03 sec 36.5 Start 392: VAddSimdBenchmark.Cdna4_VRcpF16_Vop3 36.6 392/770 Test #392: VAddSimdBenchmark.Cdna4_VRcpF16_Vop3 ................................................................................................................................................................................................................................................................. Passed 0.11 sec 36.6 Start 393: VAddSimdBenchmark.Cdna4_VFmaF32_Vop3 36.7 393/770 Test #393: VAddSimdBenchmark.Cdna4_VFmaF32_Vop3 ................................................................................................................................................................................................................................................................. Passed 0.09 sec 36.7 Start 394: VAddSimdBenchmark.SimdCompileTimeReport 36.7 394/770 Test #394: VAddSimdBenchmark.SimdCompileTimeReport .............................................................................................................................................................................................................................................................. Passed 0.00 sec 36.7 Start 395: Vop1CvtF64Scalar.F32FromF64_FullDoubleRead 36.7 395/770 Test #395: Vop1CvtF64Scalar.F32FromF64_FullDoubleRead ........................................................................................................................................................................................................................................................... Passed 0.01 sec 36.7 Start 396: Vop1CvtF64Scalar.I32FromF64_FullDoubleRead 36.7 396/770 Test #396: Vop1CvtF64Scalar.I32FromF64_FullDoubleRead ........................................................................................................................................................................................................................................................... Passed 0.01 sec 36.7 Start 397: Vop1CvtF64Scalar.U32FromF64_FullDoubleRead 36.7 397/770 Test #397: Vop1CvtF64Scalar.U32FromF64_FullDoubleRead ........................................................................................................................................................................................................................................................... Passed 0.01 sec 36.7 Start 398: Vop1CvtF64Scalar.F64FromF32_HighWordWritten 36.7 398/770 Test #398: Vop1CvtF64Scalar.F64FromF32_HighWordWritten .......................................................................................................................................................................................................................................................... Passed 0.01 sec 36.8 Start 399: Vop1CvtF64Scalar.F64FromI32_HighWordWritten 36.8 399/770 Test #399: Vop1CvtF64Scalar.F64FromI32_HighWordWritten .......................................................................................................................................................................................................................................................... Passed 0.01 sec 36.8 Start 400: Vop1CvtF64Scalar.F64FromU32_HighWordWritten 36.8 400/770 Test #400: Vop1CvtF64Scalar.F64FromU32_HighWordWritten .......................................................................................................................................................................................................................................................... Passed 0.01 sec 36.8 Start 401: VopcCmpClassScalar.F32 36.8 401/770 Test #401: VopcCmpClassScalar.F32 ............................................................................................................................................................................................................................................................................... Passed 0.01 sec 36.8 Start 402: VopcCmpClassScalar.F16 36.8 402/770 Test #402: VopcCmpClassScalar.F16 ............................................................................................................................................................................................................................................................................... Passed 0.01 sec 36.8 Start 403: VopcCmpClassScalar.F64 36.8 403/770 Test #403: VopcCmpClassScalar.F64 ............................................................................................................................................................................................................................................................................... Passed 0.01 sec 36.8 Start 404: Vop2SimdCorrectness.FullExecMask 36.8 404/770 Test #404: Vop2SimdCorrectness.FullExecMask ..................................................................................................................................................................................................................................................................... Passed 0.02 sec 36.8 Start 405: Vop2SimdCorrectness.PartialExecMask 36.8 405/770 Test #405: Vop2SimdCorrectness.PartialExecMask .................................................................................................................................................................................................................................................................. Passed 0.02 sec 36.8 Start 406: Vop2CarrySimdCorrectness.FullExecMask 36.8 406/770 Test #406: Vop2CarrySimdCorrectness.FullExecMask ................................................................................................................................................................................................................................................................ Passed 0.01 sec 36.8 Start 407: Vop2CarrySimdCorrectness.PartialExecMask 36.8 407/770 Test #407: Vop2CarrySimdCorrectness.PartialExecMask ............................................................................................................................................................................................................................................................. Passed 0.01 sec 36.8 Start 408: Vop2FmaSimdCorrectness.FullExecMask 36.9 408/770 Test #408: Vop2FmaSimdCorrectness.FullExecMask .................................................................................................................................................................................................................................................................. Passed 0.01 sec 36.9 Start 409: Vop2FmaSimdCorrectness.PartialExecMask 36.9 409/770 Test #409: Vop2FmaSimdCorrectness.PartialExecMask ............................................................................................................................................................................................................................................................... Passed 0.01 sec 36.9 Start 410: Vop2FmaF64SimdCorrectness.LaneLayoutRoundTrip 36.9 410/770 Test #410: Vop2FmaF64SimdCorrectness.LaneLayoutRoundTrip ........................................................................................................................................................................................................................................................ Passed 0.01 sec 36.9 Start 411: Vop2FmaF64SimdCorrectness.FullExecMask 36.9 411/770 Test #411: Vop2FmaF64SimdCorrectness.FullExecMask ............................................................................................................................................................................................................................................................... Passed 0.01 sec 36.9 Start 412: Vop2FmaF64SimdCorrectness.PartialExecMask 36.9 412/770 Test #412: Vop2FmaF64SimdCorrectness.PartialExecMask ............................................................................................................................................................................................................................................................ Passed 0.01 sec 36.9 Start 413: Vop2CndmaskSimdCorrectness.FullExecMask 36.9 413/770 Test #413: Vop2CndmaskSimdCorrectness.FullExecMask .............................................................................................................................................................................................................................................................. Passed 0.01 sec 36.9 Start 414: Vop2CndmaskSimdCorrectness.PartialExecMask 36.9 414/770 Test #414: Vop2CndmaskSimdCorrectness.PartialExecMask ........................................................................................................................................................................................................................................................... Passed 0.01 sec 36.9 Start 415: Vop2MinMaxSimdCorrectness.FullExecMask 36.9 415/770 Test #415: Vop2MinMaxSimdCorrectness.FullExecMask ............................................................................................................................................................................................................................................................... Passed 0.01 sec 36.9 Start 416: Vop2MinMaxSimdCorrectness.PartialExecMask 36.9 416/770 Test #416: Vop2MinMaxSimdCorrectness.PartialExecMask ............................................................................................................................................................................................................................................................ Passed 0.01 sec 36.9 Start 417: Vop1SimdCorrectness.FullExecMask 37.1 417/770 Test #417: Vop1SimdCorrectness.FullExecMask .....................................................................................................................................................................................................................................................................***Failed 0.20 sec 37.1 Running main() from /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/third_party/googletest-src/googletest/src/gtest_main.cc 37.1 Note: Google Test filter = Vop1SimdCorrectness.FullExecMask 37.1 [==========] Running 1 test from 1 test suite. 37.1 [----------] Global test environment set-up. 37.1 [----------] 1 test from Vop1SimdCorrectness 37.1 [ RUN ] Vop1SimdCorrectness.FullExecMask 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=0): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=1): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=2): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=3): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=4): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=5): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=6): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=7): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=8): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=9): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=10): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=11): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=12): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=13): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=14): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3212836864, 0, 0, ... } 37.1 v_floor_f32 (exec=0xffffffffffffffff, seed=15): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=0): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=1): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=2): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=3): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=4): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=5): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=6): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=7): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=8): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=9): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=10): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=11): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=12): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=13): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=14): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 1065353216, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 1065353216, 2147483648, 1065353216, 1065353216, ... } 37.1 v_ceil_f32 (exec=0xffffffffffffffff, seed=15): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=0): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=1): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=2): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=3): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=4): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=5): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=6): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=7): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=8): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=9): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=10): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=11): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=12): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=13): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=14): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2139095041, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 2147483648, 2139095040, 4286578688, 2143289344, 2143289345, 0, 2147483647, 1065353216, 3212836864, 1258291200, 3405774848, 1325400064, 1325400063, 1329594368, 1333788672, 3472883712, 3472883713, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2147483648, 0, 0, ... } 37.1 v_trunc_f32 (exec=0xffffffffffffffff, seed=15): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=0): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=1): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=2): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=3): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=4): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=5): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=6): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=7): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=8): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=9): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=10): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=11): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=12): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=13): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=14): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_floor_f16 (exec=0xffffffffffffffff, seed=15): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=0): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=1): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=2): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=3): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=4): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=5): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=6): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=7): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=8): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=9): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=10): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=11): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=12): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=13): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=14): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 15360, 15360, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 15360, 15360, 15360, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 15360, 15360, 15360, ... } 37.1 v_ceil_f16 (exec=0xffffffffffffffff, seed=15): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=0): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=1): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=2): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=3): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=4): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=5): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=6): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=7): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=8): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=9): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=10): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=11): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=12): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=13): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=14): SIMD path diverged from scalar body 37.1 37.1 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.1 Expected equality of these values: 37.1 scalar_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 31745, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 simd_out 37.1 Which is: { 0, 0, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 65535, 0, 0, 0, 0, 0, 0, 31743, 31744, 64512, 32257, 32257, 15360, 49152, 32768, 0, 0, 0, 0, ... } 37.1 v_trunc_f16 (exec=0xffffffffffffffff, seed=15): SIMD path diverged from scalar body 37.1 37.1 [ FAILED ] Vop1SimdCorrectness.FullExecMask (190 ms) 37.1 [----------] 1 test from Vop1SimdCorrectness (190 ms total) 37.1 37.1 [----------] Global test environment tear-down 37.1 [==========] 1 test from 1 test suite ran. (190 ms total) 37.1 [ PASSED ] 0 tests. 37.1 [ FAILED ] 1 test, listed below: 37.1 [ FAILED ] Vop1SimdCorrectness.FullExecMask 37.1 37.1 1 FAILED TEST 37.1 37.1 Start 418: Vop1SimdCorrectness.PartialExecMask 37.3 418/770 Test #418: Vop1SimdCorrectness.PartialExecMask ..................................................................................................................................................................................................................................................................***Failed 0.19 sec 37.3 Running main() from /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/third_party/googletest-src/googletest/src/gtest_main.cc 37.3 Note: Google Test filter = Vop1SimdCorrectness.PartialExecMask 37.3 [==========] Running 1 test from 1 test suite. 37.3 [----------] Global test environment set-up. 37.3 [----------] 1 test from Vop1SimdCorrectness 37.3 [ RUN ] Vop1SimdCorrectness.PartialExecMask 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_floor_f16 (exec=0xa5a5f0f012348001, seed=0): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_floor_f16 (exec=0xa5a5f0f012348001, seed=2): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_floor_f16 (exec=0xa5a5f0f012348001, seed=7): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_floor_f16 (exec=0xa5a5f0f012348001, seed=10): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_floor_f16 (exec=0xa5a5f0f012348001, seed=14): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_ceil_f16 (exec=0xa5a5f0f012348001, seed=0): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_ceil_f16 (exec=0xa5a5f0f012348001, seed=2): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_ceil_f16 (exec=0xa5a5f0f012348001, seed=7): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_ceil_f16 (exec=0xa5a5f0f012348001, seed=10): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 15360, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_ceil_f16 (exec=0xa5a5f0f012348001, seed=14): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_trunc_f16 (exec=0xa5a5f0f012348001, seed=0): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_trunc_f16 (exec=0xa5a5f0f012348001, seed=2): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_trunc_f16 (exec=0xa5a5f0f012348001, seed=7): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_trunc_f16 (exec=0xa5a5f0f012348001, seed=10): SIMD path diverged from scalar body 37.3 37.3 /__w/rockrel/rockrel/rocm-systems/emulation/rocjitsu/tests/simd_correctness/vop1_simd_correctness_test.cpp:239: Failure 37.3 Expected equality of these values: 37.3 scalar_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 simd_out 37.3 Which is: { 0, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 3405705229, 0, 3405705229, 3405705229, 0, 3405705229, 31743, 31744, 3405705229, 3405705229, 3405705229, 15360, 3405705229, 3405705229, 0, 3405705229, 3405705229, 3405705229, ... } 37.3 v_trunc_f16 (exec=0xa5a5f0f012348001, seed=14): SIMD path diverged from scalar body 37.3 37.3 [ FAILED ] Vop1SimdCorrectness.PartialExecMask (189 ms) 37.3 [----------] 1 test from Vop1SimdCorrectness (189 ms total) 37.3 37.3 [----------] Global test environment tear-down 37.3 [==========] 1 test from 1 test suite ran. (189 ms total) 37.3 [ PASSED ] 0 tests. 37.3 [ FAILED ] 1 test, listed below: 37.3 [ FAILED ] Vop1SimdCorrectness.PartialExecMask 37.3 37.3 1 FAILED TEST 37.3 37.3 Start 419: Vop1CvtF8SimdCorrectness.AllBytes_FullExec 37.3 419/770 Test #419: Vop1CvtF8SimdCorrectness.AllBytes_FullExec ........................................................................................................................................................................................................................................................... Passed 0.01 sec 37.3 Start 420: Vop1CvtF8SimdCorrectness.AllBytes_PartialExec 37.3 420/770 Test #420: Vop1CvtF8SimdCorrectness.AllBytes_PartialExec ........................................................................................................................................................................................................................................................ Passed 0.01 sec 37.3 Start 421: Vop1F64SimdCorrectness.FullExecMask 37.4 421/770 Test #421: Vop1F64SimdCorrectness.FullExecMask .................................................................................................................................................................................................................................................................. Passed 0.01 sec 37.4 Start 422: Vop1F64SimdCorrectness.PartialExecMask 37.4 422/770 Test #422: Vop1F64SimdCorrectness.PartialExecMask ............................................................................................................................................................................................................................................................... Passed 0.01 sec 37.4 Start 423: Vop1CvtF64SimdCorrectness.FullExecMask 37.4 423/770 Test #423: Vop1CvtF64SimdCorrectness.FullExecMask ............................................................................................................................................................................................................................................................... Passed 0.01 sec 37.4 Start 424: Vop1CvtF64SimdCorrectness.PartialExecMask 37.4 424/770 Test #424: Vop1CvtF64SimdCorrectness.PartialExecMask ............................................................................................................................................................................................................................................................ Passed 0.01 sec 37.4 Start 425: VopcSimdCorrectness.FullExecMask 37.4 425/770 Test #425: VopcSimdCorrectness.FullExecMask ..................................................................................................................................................................................................................................................................... Passed 0.06 sec 37.4 Start 426: VopcSimdCorrectness.PartialExecMask 37.5 426/770 Test #426: VopcSimdCorrectness.PartialExecMask .................................................................................................................................................................................................................................................................. Passed 0.08 sec 37.5 Start 427: VopcCmpClassSimdCorrectness.FullExecMask 37.7 427/770 Test #427: VopcCmpClassSimdCorrectness.FullExecMask ............................................................................................................................................................................................................................................................. Passed 0.16 sec 37.7 Start 428: VopcCmpClassSimdCorrectness.PartialExecMask 37.9 428/770 Test #428: VopcCmpClassSimdCorrectness.PartialExecMask .......................................................................................................................................................................................................................................................... Passed 0.18 sec 37.9 Start 429: Vop3ModifierSimd.SrcMod_AllAbsNegCombos_BitExact 37.9 429/770 Test #429: Vop3ModifierSimd.SrcMod_AllAbsNegCombos_BitExact ..................................................................................................................................................................................................................................................... Passed 0.00 sec 37.9 Start 430: Vop3ModifierSimd.DstMod_AllOmodClampCombos_BitExact 37.9 430/770 Test #430: Vop3ModifierSimd.DstMod_AllOmodClampCombos_BitExact .................................................................................................................................................................................................................................................. Passed 0.00 sec 37.9 Start 431: Vop3BinarySimdCorrectness.F32_AllModifiers_FullExec 38.1 431/770 Test #431: Vop3BinarySimdCorrectness.F32_AllModifiers_FullExec .................................................................................................................................................................................................................................................. Passed 0.20 sec 38.1 Start 432: Vop3BinarySimdCorrectness.F32_AllModifiers_PartialExec 38.3 432/770 Test #432: Vop3BinarySimdCorrectness.F32_AllModifiers_PartialExec ............................................................................................................................................................................................................................................... Passed 0.19 sec 38.3 Start 433: Vop3BinarySimdCorrectness.Int_FullAndPartialExec 38.3 433/770 Test #433: Vop3BinarySimdCorrectness.Int_FullAndPartialExec ..................................................................................................................................................................................................................................................... Passed 0.01 sec 38.3 Start 434: Vop3BinarySimdCorrectness.F16_AllModifiers_FullExec 38.5 434/770 Test #434: Vop3BinarySimdCorrectness.F16_AllModifiers_FullExec .................................................................................................................................................................................................................................................. Passed 0.20 sec 38.5 Start 435: Vop3BinarySimdCorrectness.F16_AllModifiers_PartialExec 38.7 435/770 Test #435: Vop3BinarySimdCorrectness.F16_AllModifiers_PartialExec ............................................................................................................................................................................................................................................... Passed 0.19 sec 38.7 Start 436: Vop3UnarySimdCorrectness.Fp_AllModifiers_FullExec 38.7 436/770 Test #436: Vop3UnarySimdCorrectness.Fp_AllModifiers_FullExec .................................................................................................................................................................................................................................................... Passed 0.05 sec 38.7 Start 437: Vop3UnarySimdCorrectness.Fp_AllModifiers_PartialExec 38.8 437/770 Test #437: Vop3UnarySimdCorrectness.Fp_AllModifiers_PartialExec ................................................................................................................................................................................................................................................. Passed 0.05 sec 38.8 Start 438: Vop3UnarySimdCorrectness.Plain_FullAndPartialExec 38.8 438/770 Test #438: Vop3UnarySimdCorrectness.Plain_FullAndPartialExec .................................................................................................................................................................................................................................................... Passed 0.01 sec 38.8 Start 439: Vop3UnarySimdCorrectness.MovB32_PreservesBits 38.8 439/770 Test #439: Vop3UnarySimdCorrectness.MovB32_PreservesBits ........................................................................................................................................................................................................................................................ Passed 0.01 sec 38.8 Start 440: VopcVop3IntSimdCorrectness.FullExec 39.3 440/770 Test #440: VopcVop3IntSimdCorrectness.FullExec .................................................................................................................................................................................................................................................................. Passed 0.50 sec 39.3 Start 441: VopcVop3IntSimdCorrectness.PartialExec 39.7 441/770 Test #441: VopcVop3IntSimdCorrectness.PartialExec ............................................................................................................................................................................................................................................................... Passed 0.43 sec 39.7 Start 442: VopcVop3Fp32SimdCorrectness.FullExec 42.4 442/770 Test #442: VopcVop3Fp32SimdCorrectness.FullExec ................................................................................................................................................................................................................................................................. Passed 2.63 sec 42.4 Start 443: VopcVop3Fp32SimdCorrectness.PartialExec 45.0 443/770 Test #443: VopcVop3Fp32SimdCorrectness.PartialExec .............................................................................................................................................................................................................................................................. Passed 2.66 sec 45.0 Start 444: VopcVop3Fp16SimdCorrectness.FullExec 47.6 444/770 Test #444: VopcVop3Fp16SimdCorrectness.FullExec ................................................................................................................................................................................................................................................................. Passed 2.62 sec 47.6 Start 445: VopcVop3Fp16SimdCorrectness.PartialExec 50.3 445/770 Test #445: VopcVop3Fp16SimdCorrectness.PartialExec .............................................................................................................................................................................................................................................................. Passed 2.63 sec 50.3 Start 446: VopcVop3Fp64SimdCorrectness.FullExec 52.9 446/770 Test #446: VopcVop3Fp64SimdCorrectness.FullExec ................................................................................................................................................................................................................................................................. Passed 2.64 sec 52.9 Start 447: VopcVop3Fp64SimdCorrectness.PartialExec 55.2 447/770 Test #447: VopcVop3Fp64SimdCorrectness.PartialExec .............................................................................................................................................................................................................................................................. Passed 2.28 sec 55.2 Start 448: Vop3TernaryIntSimdCorrectness.FullExec 55.3 448/770 Test #448: Vop3TernaryIntSimdCorrectness.FullExec ............................................................................................................................................................................................................................................................... Passed 0.09 sec 55.3 Start 449: Vop3TernaryIntSimdCorrectness.PartialExec 55.4 449/770 Test #449: Vop3TernaryIntSimdCorrectness.PartialExec ............................................................................................................................................................................................................................................................ Passed 0.09 sec 55.4 Start 450: Vop3CvtF64SimdCorrectness.FullExec 55.4 450/770 Test #450: Vop3CvtF64SimdCorrectness.FullExec ................................................................................................................................................................................................................................................................... Passed 0.01 sec 55.4 Start 451: Vop3CvtF64SimdCorrectness.PartialExec 55.4 451/770 Test #451: Vop3CvtF64SimdCorrectness.PartialExec ................................................................................................................................................................................................................................................................ Passed 0.01 sec 55.4 Start 452: Vop3IntBinaryExtraSimdCorrectness.FullExec 55.4 452/770 Test #452: Vop3IntBinaryExtraSimdCorrectness.FullExec ........................................................................................................................................................................................................................................................... Passed 0.03 sec 55.4 Start 453: Vop3IntBinaryExtraSimdCorrectness.PartialExec 55.5 453/770 Test #453: Vop3IntBinaryExtraSimdCorrectness.PartialExec ........................................................................................................................................................................................................................................................ Passed 0.03 sec 55.5 Start 454: Vop3IntWideningTernarySimdCorrectness.FullExec 55.5 454/770 Test #454: Vop3IntWideningTernarySimdCorrectness.FullExec ....................................................................................................................................................................................................................................................... Passed 0.06 sec 55.5 Start 455: Vop3IntWideningTernarySimdCorrectness.PartialExec 55.6 455/770 Test #455: Vop3IntWideningTernarySimdCorrectness.PartialExec .................................................................................................................................................................................................................................................... Passed 0.07 sec 55.6 Start 456: Vop3Fp64SimdCorrectness.FullExec 57.7 456/770 Test #456: Vop3Fp64SimdCorrectness.FullExec ..................................................................................................................................................................................................................................................................... Passed 2.09 sec 57.7 Start 457: Vop3Fp64SimdCorrectness.PartialExec 57.7 457/770 Test #457: Vop3Fp64SimdCorrectness.PartialExec .................................................................................................................................................................................................................................................................. Passed 0.03 sec 57.7 Start 458: Vop3CarrySimdCorrectness.Cdna4FullExecMask 57.7 458/770 Test #458: Vop3CarrySimdCorrectness.Cdna4FullExecMask ........................................................................................................................................................................................................................................................... Passed 0.03 sec 57.7 Start 459: Vop3CarrySimdCorrectness.Cdna4PartialExecMask 57.8 459/770 Test #459: Vop3CarrySimdCorrectness.Cdna4PartialExecMask ........................................................................................................................................................................................................................................................ Passed 0.03 sec 57.8 Start 460: Vop3CarrySimdCorrectness.RdnaFullExecMask 57.8 460/770 Test #460: Vop3CarrySimdCorrectness.RdnaFullExecMask ............................................................................................................................................................................................................................................................ Passed 0.02 sec 57.8 Start 461: Vop3CarrySimdCorrectness.RdnaPartialExecMask 57.8 461/770 Test #461: Vop3CarrySimdCorrectness.RdnaPartialExecMask ......................................................................................................................................................................................................................................................... Passed 0.02 sec 57.8 Start 462: VopAliasRdnaSimdCorrectness.FullExec 57.9 462/770 Test #462: VopAliasRdnaSimdCorrectness.FullExec ................................................................................................................................................................................................................................................................. Passed 0.09 sec 57.9 Start 463: VopAliasRdnaSimdCorrectness.PartialExec 58.0 463/770 Test #463: VopAliasRdnaSimdCorrectness.PartialExec .............................................................................................................................................................................................................................................................. Passed 0.10 sec 58.0 Start 464: Vop3Shift64SimdCorrectness.MadWide64 58.0 464/770 Test #464: Vop3Shift64SimdCorrectness.MadWide64 ................................................................................................................................................................................................................................................................. Passed 0.05 sec 58.0 Start 465: Vop3Shift64SimdCorrectness.RevShiftsFullExec 58.1 465/770 Test #465: Vop3Shift64SimdCorrectness.RevShiftsFullExec ......................................................................................................................................................................................................................................................... Passed 0.04 sec 58.1 Start 466: Vop3Shift64SimdCorrectness.RevShiftsPartialExec 58.1 466/770 Test #466: Vop3Shift64SimdCorrectness.RevShiftsPartialExec ...................................................................................................................................................................................................................................................... Passed 0.04 sec 58.1 Start 467: Vop3Shift64SimdCorrectness.LshlAddFullExec 58.1 467/770 Test #467: Vop3Shift64SimdCorrectness.LshlAddFullExec ........................................................................................................................................................................................................................................................... Passed 0.02 sec 58.1 Start 468: Vop3Shift64SimdCorrectness.LshlAddPartialExec 58.1 468/770 Test #468: Vop3Shift64SimdCorrectness.LshlAddPartialExec ........................................................................................................................................................................................................................................................ Passed 0.02 sec 58.1 Start 469: Vop3Shift64Scalar.LshlrevB64 58.1 469/770 Test #469: Vop3Shift64Scalar.LshlrevB64 ......................................................................................................................................................................................................................................................................... Passed 0.01 sec 58.1 Start 470: Vop3Shift64Scalar.LshrrevB64 58.2 470/770 Test #470: Vop3Shift64Scalar.LshrrevB64 ......................................................................................................................................................................................................................................................................... Passed 0.01 sec 58.2 Start 471: Vop3Shift64Scalar.AshrrevI64 58.2 471/770 Test #471: Vop3Shift64Scalar.AshrrevI64 ......................................................................................................................................................................................................................................................................... Passed 0.01 sec 58.2 Start 472: Vop3Shift64Scalar.LshlAddU64 58.2 472/770 Test #472: Vop3Shift64Scalar.LshlAddU64 ......................................................................................................................................................................................................................................................................... Passed 0.01 sec 58.2 Start 473: Vop3Shift64Scalar.LshlAddU32 58.2 473/770 Test #473: Vop3Shift64Scalar.LshlAddU32 ......................................................................................................................................................................................................................................................................... Passed 0.01 sec 58.2 Start 474: Vop3Fp16UnarySimdCorrectness.FullExec 58.2 474/770 Test #474: Vop3Fp16UnarySimdCorrectness.FullExec ................................................................................................................................................................................................................................................................ Passed 0.06 sec 58.2 Start 475: Vop3Fp16UnarySimdCorrectness.PartialExec 58.2 475/770 Test #475: Vop3Fp16UnarySimdCorrectness.PartialExec ............................................................................................................................................................................................................................................................. Passed 0.01 sec 58.2 Start 476: Vop3Fp16TranscendentalSimdCorrectness.EdgeInputs_FullExec 58.3 476/770 Test #476: Vop3Fp16TranscendentalSimdCorrectness.EdgeInputs_FullExec ............................................................................................................................................................................................................................................ Passed 0.04 sec 58.3 Start 477: Vop3Fp16TranscendentalSimdCorrectness.EdgeInputs_PartialExec 58.3 477/770 Test #477: Vop3Fp16TranscendentalSimdCorrectness.EdgeInputs_PartialExec ......................................................................................................................................................................................................................................... Passed 0.01 sec 58.3 Start 478: Vop3Fp16TranscendentalSimdCorrectness.ExhaustiveSweep 59.3 478/770 Test #478: Vop3Fp16TranscendentalSimdCorrectness.ExhaustiveSweep ................................................................................................................................................................................................................................................ Passed 1.01 sec 59.3 Start 479: Vop3CndmaskPackSimdCorrectness.Cndmask_FullExec 59.3 479/770 Test #479: Vop3CndmaskPackSimdCorrectness.Cndmask_FullExec ...................................................................................................................................................................................................................................................... Passed 0.03 sec 59.3 Start 480: Vop3CndmaskPackSimdCorrectness.Cndmask_PartialExec 59.4 480/770 Test #480: Vop3CndmaskPackSimdCorrectness.Cndmask_PartialExec ................................................................................................................................................................................................................................................... Passed 0.03 sec 59.4 Start 481: Vop3CndmaskPackSimdCorrectness.Pack_FullExec 59.4 481/770 Test #481: Vop3CndmaskPackSimdCorrectness.Pack_FullExec ......................................................................................................................................................................................................................................................... Passed 0.01 sec 59.4 Start 482: Vop3CndmaskPackSimdCorrectness.Pack_PartialExec 59.4 482/770 Test #482: Vop3CndmaskPackSimdCorrectness.Pack_PartialExec ...................................................................................................................................................................................................................................................... Passed 0.01 sec 59.4 Start 483: Vop3DivHelpersSimdCorrectness.DivFixupF32_FullExec 59.5 483/770 Test #483: Vop3DivHelpersSimdCorrectness.DivFixupF32_FullExec ................................................................................................................................................................................................................................................... Passed 0.07 sec 59.5 Start 484: Vop3DivHelpersSimdCorrectness.DivFixupF32_PartialExec 59.5 484/770 Test #484: Vop3DivHelpersSimdCorrectness.DivFixupF32_PartialExec ................................................................................................................................................................................................................................................ Passed 0.07 sec 59.5 Start 485: Vop3DivHelpersSimdCorrectness.DivFixupF64_FullExec 59.6 485/770 Test #485: Vop3DivHelpersSimdCorrectness.DivFixupF64_FullExec ................................................................................................................................................................................................................................................... Passed 0.03 sec 59.6 Start 486: Vop3DivHelpersSimdCorrectness.DivFixupF64_PartialExec 59.6 486/770 Test #486: Vop3DivHelpersSimdCorrectness.DivFixupF64_PartialExec ................................................................................................................................................................................................................................................ Passed 0.03 sec 59.6 Start 487: Vop3DivHelpersSimdCorrectness.DivFixupF32Family_Source2NaNPrecedence 59.6 487/770 Test #487: Vop3DivHelpersSimdCorrectness.DivFixupF32Family_Source2NaNPrecedence ................................................................................................................................................................................................................................. Passed 0.01 sec 59.6 Start 488: Vop3DivHelpersSimdCorrectness.DivFixupF64_Source2NaNPrecedence 59.6 488/770 Test #488: Vop3DivHelpersSimdCorrectness.DivFixupF64_Source2NaNPrecedence ....................................................................................................................................................................................................................................... Passed 0.01 sec 59.6 Start 489: Vop3DivHelpersSimdCorrectness.DivFmasF32_FullExec 59.6 489/770 Test #489: Vop3DivHelpersSimdCorrectness.DivFmasF32_FullExec .................................................................................................................................................................................................................................................... Passed 0.01 sec 59.6 Start 490: Vop3DivHelpersSimdCorrectness.DivFmasF32_PartialExec 59.6 490/770 Test #490: Vop3DivHelpersSimdCorrectness.DivFmasF32_PartialExec ................................................................................................................................................................................................................................................. Passed 0.01 sec 59.6 Start 491: Vop3DivHelpersSimdCorrectness.DivFmasF64_FullExec 59.7 491/770 Test #491: Vop3DivHelpersSimdCorrectness.DivFmasF64_FullExec .................................................................................................................................................................................................................................................... Passed 0.01 sec 59.7 Start 492: Vop3DivHelpersSimdCorrectness.DivFmasF64_PartialExec 59.7 492/770 Test #492: Vop3DivHelpersSimdCorrectness.DivFmasF64_PartialExec ................................................................................................................................................................................................................................................. Passed 0.01 sec 59.7 Start 493: Vop3B16RdnaSimdCorrectness.BitwiseBinary_FullExec 59.7 493/770 Test #493: Vop3B16RdnaSimdCorrectness.BitwiseBinary_FullExec .................................................................................................................................................................................................................................................... Passed 0.02 sec 59.7 Start 494: Vop3B16RdnaSimdCorrectness.BitwiseBinary_PartialExec 59.7 494/770 Test #494: Vop3B16RdnaSimdCorrectness.BitwiseBinary_PartialExec ................................................................................................................................................................................................................................................. Passed 0.02 sec 59.7 Start 495: Vop3B16RdnaSimdCorrectness.NotB16_FullExec 59.7 495/770 Test #495: Vop3B16RdnaSimdCorrectness.NotB16_FullExec ........................................................................................................................................................................................................................................................... Passed 0.01 sec 59.7 Start 496: Vop3B16RdnaSimdCorrectness.NotB16_PartialExec 59.7 496/770 Test #496: Vop3B16RdnaSimdCorrectness.NotB16_PartialExec ........................................................................................................................................................................................................................................................ Passed 0.01 sec 59.7 Start 497: Vop3B16RdnaSimdCorrectness.CndmaskB16_FullExec 59.7 497/770 Test #497: Vop3B16RdnaSimdCorrectness.CndmaskB16_FullExec ....................................................................................................................................................................................................................................................... Passed 0.02 sec 59.7 Start 498: Vop3B16RdnaSimdCorrectness.CndmaskB16_PartialExec 59.8 498/770 Test #498: Vop3B16RdnaSimdCorrectness.CndmaskB16_PartialExec .................................................................................................................................................................................................................................................... Passed 0.02 sec 59.8 Start 499: Vop3B16RdnaSimdCorrectness.MovB16_FullExec 59.8 499/770 Test #499: Vop3B16RdnaSimdCorrectness.MovB16_FullExec ........................................................................................................................................................................................................................................................... Passed 0.01 sec 59.8 Start 500: Vop3B16RdnaSimdCorrectness.MovB16_PartialExec 59.8 500/770 Test #500: Vop3B16RdnaSimdCorrectness.MovB16_PartialExec ........................................................................................................................................................................................................................................................ Passed 0.01 sec 59.8 Start 501: Vop3TernaryFpSimdCorrectness.FullExec 60.4 501/770 Test #501: Vop3TernaryFpSimdCorrectness.FullExec ................................................................................................................................................................................................................................................................ Passed 0.59 sec 60.4 Start 502: Vop3TernaryFpSimdCorrectness.PartialExec 60.4 502/770 Test #502: Vop3TernaryFpSimdCorrectness.PartialExec ............................................................................................................................................................................................................................................................. Passed 0.04 sec 60.4 Start 503: Vop3FmacSimdCorrectness.FullExec 61.9 503/770 Test #503: Vop3FmacSimdCorrectness.FullExec ..................................................................................................................................................................................................................................................................... Passed 1.52 sec 61.9 Start 504: Vop3FmacSimdCorrectness.PartialExec 62.0 504/770 Test #504: Vop3FmacSimdCorrectness.PartialExec .................................................................................................................................................................................................................................................................. Passed 0.02 sec 62.0 Start 505: Vop3LdexpSimdCorrectness.FullExec 62.1 505/770 Test #505: Vop3LdexpSimdCorrectness.FullExec .................................................................................................................................................................................................................................................................... Passed 0.17 sec 62.1 Start 506: Vop3LdexpSimdCorrectness.PartialExec 62.1 506/770 Test #506: Vop3LdexpSimdCorrectness.PartialExec ................................................................................................................................................................................................................................................................. Passed 0.01 sec 62.1 Start 507: Vop3pPkBinaryIntSimdCorrectness.FullExec 62.2 507/770 Test #507: Vop3pPkBinaryIntSimdCorrectness.FullExec ............................................................................................................................................................................................................................................................. Passed 0.05 sec 62.2 Start 508: Vop3pPkBinaryIntSimdCorrectness.PartialExec 62.3 508/770 Test #508: Vop3pPkBinaryIntSimdCorrectness.PartialExec .......................................................................................................................................................................................................................................................... Passed 0.05 sec 62.3 Start 509: Vop3pPkBinaryFp16SimdCorrectness.FullExecAllModifiers 62.5 509/770 Test #509: Vop3pPkBinaryFp16SimdCorrectness.FullExecAllModifiers ................................................................................................................................................................................................................................................ Passed 0.25 sec 62.5 Start 510: Vop3pPkBinaryFp16SimdCorrectness.PartialExec 62.5 510/770 Test #510: Vop3pPkBinaryFp16SimdCorrectness.PartialExec ......................................................................................................................................................................................................................................................... Passed 0.03 sec 62.5 Start 511: Vop3pFmaMixSimdCorrectness.RdnaFmaMixF32_FullExec 62.6 511/770 Test #511: Vop3pFmaMixSimdCorrectness.RdnaFmaMixF32_FullExec .................................................................................................................................................................................................................................................... Passed 0.03 sec 62.6 Start 512: Vop3pFmaMixSimdCorrectness.RdnaFmaMixF32_PartialExec 62.6 512/770 Test #512: Vop3pFmaMixSimdCorrectness.RdnaFmaMixF32_PartialExec ................................................................................................................................................................................................................................................. Passed 0.03 sec 62.6 Start 513: Vop3pFmaMixSimdCorrectness.RdnaFmaMixLoF16_FullExec 62.6 513/770 Test #513: Vop3pFmaMixSimdCorrectness.RdnaFmaMixLoF16_FullExec .................................................................................................................................................................................................................................................. Passed 0.03 sec 62.6 Start 514: Vop3pFmaMixSimdCorrectness.RdnaFmaMixLoF16_PartialExec 62.7 514/770 Test #514: Vop3pFmaMixSimdCorrectness.RdnaFmaMixLoF16_PartialExec ............................................................................................................................................................................................................................................... Passed 0.03 sec 62.7 Start 515: Vop3pFmaMixSimdCorrectness.RdnaFmaMixHiF16_FullExec 62.7 515/770 Test #515: Vop3pFmaMixSimdCorrectness.RdnaFmaMixHiF16_FullExec .................................................................................................................................................................................................................................................. Passed 0.03 sec 62.7 Start 516: Vop3pFmaMixSimdCorrectness.RdnaFmaMixHiF16_PartialExec 62.7 516/770 Test #516: Vop3pFmaMixSimdCorrectness.RdnaFmaMixHiF16_PartialExec ............................................................................................................................................................................................................................................... Passed 0.03 sec 62.7 Start 517: Vop3pFmaMixSimdCorrectness.CdnaMadMixF32_FullExec 62.8 517/770 Test #517: Vop3pFmaMixSimdCorrectness.CdnaMadMixF32_FullExec .................................................................................................................................................................................................................................................... Passed 0.04 sec 62.8 Start 518: Vop3pFmaMixSimdCorrectness.CdnaMadMixF32_PartialExec 62.8 518/770 Test #518: Vop3pFmaMixSimdCorrectness.CdnaMadMixF32_PartialExec ................................................................................................................................................................................................................................................. Passed 0.04 sec 62.8 Start 519: Vop3pFmaMixSimdCorrectness.CdnaMadMixLoF16_FullExec 62.8 519/770 Test #519: Vop3pFmaMixSimdCorrectness.CdnaMadMixLoF16_FullExec .................................................................................................................................................................................................................................................. Passed 0.04 sec 62.8 Start 520: Vop3pFmaMixSimdCorrectness.CdnaMadMixLoF16_PartialExec 62.9 520/770 Test #520: Vop3pFmaMixSimdCorrectness.CdnaMadMixLoF16_PartialExec ............................................................................................................................................................................................................................................... Passed 0.04 sec 62.9 Start 521: Vop3pFmaMixSimdCorrectness.CdnaMadMixHiF16_FullExec 62.9 521/770 Test #521: Vop3pFmaMixSimdCorrectness.CdnaMadMixHiF16_FullExec .................................................................................................................................................................................................................................................. Passed 0.03 sec 62.9 Start 522: Vop3pFmaMixSimdCorrectness.CdnaMadMixHiF16_PartialExec 62.9 522/770 Test #522: Vop3pFmaMixSimdCorrectness.CdnaMadMixHiF16_PartialExec ............................................................................................................................................................................................................................................... Passed 0.04 sec 62.9 Start 523: Vop3pMovB32SimdCorrectness.FullExec 62.9 523/770 Test #523: Vop3pMovB32SimdCorrectness.FullExec .................................................................................................................................................................................................................................................................. Passed 0.01 sec 62.9 Start 524: Vop3pMovB32SimdCorrectness.PartialExec 63.0 524/770 Test #524: Vop3pMovB32SimdCorrectness.PartialExec ............................................................................................................................................................................................................................................................... Passed 0.01 sec 63.0 Start 525: Vop3pDotIntSimdCorrectness.FullExec 63.0 525/770 Test #525: Vop3pDotIntSimdCorrectness.FullExec .................................................................................................................................................................................................................................................................. Passed 0.04 sec 63.0 Start 526: Vop3pDotIntSimdCorrectness.PartialExec 63.0 526/770 Test #526: Vop3pDotIntSimdCorrectness.PartialExec ............................................................................................................................................................................................................................................................... Passed 0.04 sec 63.0 Start 527: Vop3pDotF16SimdCorrectness.FullExecAllModifiers 63.2 527/770 Test #527: Vop3pDotF16SimdCorrectness.FullExecAllModifiers ...................................................................................................................................................................................................................................................... Passed 0.20 sec 63.2 Start 528: Vop3pDotF16SimdCorrectness.PartialExec 63.3 528/770 Test #528: Vop3pDotF16SimdCorrectness.PartialExec ............................................................................................................................................................................................................................................................... Passed 0.01 sec 63.3 Start 529: ExecutionPluginTest.NoPluginNoCrash 63.3 529/770 Test #529: ExecutionPluginTest.NoPluginNoCrash .................................................................................................................................................................................................................................................................. Passed 0.01 sec 63.3 Start 530: HookOrderingTest.BarrierTwoWaves 63.3 530/770 Test #530: HookOrderingTest.BarrierTwoWaves ..................................................................................................................................................................................................................................................................... Passed 0.01 sec 63.3 Start 531: HookOrderingTest.WorkgroupDispatchedReportsPhysicalVgprBlockSize 63.3 531/770 Test #531: HookOrderingTest.WorkgroupDispatchedReportsPhysicalVgprBlockSize ..................................................................................................................................................................................................................................... Passed 0.01 sec 63.3 Start 532: HookOrderingTest.FiveDispatchLifecycle 63.3 532/770 Test #532: HookOrderingTest.FiveDispatchLifecycle ............................................................................................................................................................................................................................................................... Passed 0.01 sec 63.3 Start 533: FormatTraceTest.WaveLaneAnnotations 63.3 533/770 Test #533: FormatTraceTest.WaveLaneAnnotations .................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.3 Start 534: FormatTraceTest.NoLineBeforeFirstMarker 63.3 534/770 Test #534: FormatTraceTest.NoLineBeforeFirstMarker .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.3 Start 535: FormatTraceTest.ConflictBeforeTraceWindow 63.3 535/770 Test #535: FormatTraceTest.ConflictBeforeTraceWindow ............................................................................................................................................................................................................................................................ Passed 0.00 sec 63.3 Start 536: RaceDetector.Vgpr_InsufficientVmcnt 63.3 536/770 Test #536: RaceDetector.Vgpr_InsufficientVmcnt .................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.3 Start 537: RaceDetector.Vgpr_ViolationFields 63.3 537/770 Test #537: RaceDetector.Vgpr_ViolationFields .................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.3 Start 538: RaceDetector.Vgpr_WaitcntClearsRace 63.3 538/770 Test #538: RaceDetector.Vgpr_WaitcntClearsRace .................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.3 Start 539: RaceDetector.Sgpr_MissingWaitcnt 63.3 539/770 Test #539: RaceDetector.Sgpr_MissingWaitcnt ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.3 Start 540: RaceDetector.Sgpr_WithWaitcnt 63.3 540/770 Test #540: RaceDetector.Sgpr_WithWaitcnt ........................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.3 Start 541: RaceDetector.Sgpr_PartialWaitcnt 63.3 541/770 Test #541: RaceDetector.Sgpr_PartialWaitcnt ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.3 Start 542: RaceDetector.LdsCrossWave_ZeroLdsSize 63.3 542/770 Test #542: RaceDetector.LdsCrossWave_ZeroLdsSize ................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.3 Start 543: RaceDetector.LdsCrossWave_MissingBarrier 63.3 543/770 Test #543: RaceDetector.LdsCrossWave_MissingBarrier ............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.3 Start 544: RaceDetector.LdsCrossWave_WithBarrier 63.3 544/770 Test #544: RaceDetector.LdsCrossWave_WithBarrier ................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.3 Start 545: RaceDetector.LdsSameWave_WriteWriteOk 63.3 545/770 Test #545: RaceDetector.LdsSameWave_WriteWriteOk ................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.3 Start 546: RaceDetector.LdsSameWave_ReadReadOk 63.4 546/770 Test #546: RaceDetector.LdsSameWave_ReadReadOk .................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.4 Start 547: RaceDetector.LdsSameWave_WriteReadRace 63.4 547/770 Test #547: RaceDetector.LdsSameWave_WriteReadRace ............................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 548: RaceDetector.LdsSameWave_InsufficientLgkm 63.4 548/770 Test #548: RaceDetector.LdsSameWave_InsufficientLgkm ............................................................................................................................................................................................................................................................ Passed 0.00 sec 63.4 Start 549: RaceDetector.SameWave_WriteReadRace 63.4 549/770 Test #549: RaceDetector.SameWave_WriteReadRace .................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.4 Start 550: RaceDetector.SameWave_WriteWaitcntOk 63.4 550/770 Test #550: RaceDetector.SameWave_WriteWaitcntOk ................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.4 Start 551: RaceDetector.SameWave_DoubleWriteRace 63.4 551/770 Test #551: RaceDetector.SameWave_DoubleWriteRace ................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.4 Start 552: RaceDetector.SameWave_BarrierNoWaitcnt 63.4 552/770 Test #552: RaceDetector.SameWave_BarrierNoWaitcnt ............................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 553: RaceDetector.SameWave_WaitcntBarrierOk 63.4 553/770 Test #553: RaceDetector.SameWave_WaitcntBarrierOk ............................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 554: RaceDetector.DeepStack_PartialWaitcnt 63.4 554/770 Test #554: RaceDetector.DeepStack_PartialWaitcnt ................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.4 Start 555: RaceDetector.DeepStack_FullWaitcnt 63.4 555/770 Test #555: RaceDetector.DeepStack_FullWaitcnt ................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 556: RaceDetector.DeepStack_ConsecutiveWaitcnts 63.4 556/770 Test #556: RaceDetector.DeepStack_ConsecutiveWaitcnts ........................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 557: RaceDetector.D16_LoHiLoadDrained 63.4 557/770 Test #557: RaceDetector.D16_LoHiLoadDrained ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 558: RaceDetector.D16_HiOutstanding_LoSafe 63.4 558/770 Test #558: RaceDetector.D16_HiOutstanding_LoSafe ................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.4 Start 559: RaceDetector.D16_FullLoadRaces 63.4 559/770 Test #559: RaceDetector.D16_FullLoadRaces ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 560: RaceDetector.D16_LoOutstanding_FullRaces 63.4 560/770 Test #560: RaceDetector.D16_LoOutstanding_FullRaces ............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.4 Start 561: RaceDetector.Dtl_CrossWaveRace 63.4 561/770 Test #561: RaceDetector.Dtl_CrossWaveRace ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 562: RaceDetector.Dtl_CrossWaveSafe 63.4 562/770 Test #562: RaceDetector.Dtl_CrossWaveSafe ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 563: RaceDetector.Exec_PartialWriteFullRead 63.4 563/770 Test #563: RaceDetector.Exec_PartialWriteFullRead ............................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 564: RaceDetector.Exec_PartialWriteWaitcntOk 63.4 564/770 Test #564: RaceDetector.Exec_PartialWriteWaitcntOk .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.4 Start 565: RaceDetector.Exec_DisjointLanesOverlap 63.4 565/770 Test #565: RaceDetector.Exec_DisjointLanesOverlap ............................................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 566: RaceDetector.Exec_DisjointLanesDisjoint 63.4 566/770 Test #566: RaceDetector.Exec_DisjointLanesDisjoint .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.4 Start 567: RaceDetector.MultiWorkgroup_ReportsIndex 63.4 567/770 Test #567: RaceDetector.MultiWorkgroup_ReportsIndex ............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.4 Start 568: RaceDetector.LdsCrossWave_GlobalLoadToLdsWriteMissingVmcnt 63.4 568/770 Test #568: RaceDetector.LdsCrossWave_GlobalLoadToLdsWriteMissingVmcnt ........................................................................................................................................................................................................................................... Passed 0.00 sec 63.4 Start 569: RaceDetector.LdsSameWave_MultiLaneReadOk 63.4 569/770 Test #569: RaceDetector.LdsSameWave_MultiLaneReadOk ............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.4 Start 570: RaceDetector.LdsSameWave_ScatterBroadcastOk 63.5 570/770 Test #570: RaceDetector.LdsSameWave_ScatterBroadcastOk .......................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 571: RaceDetector.LdsSameWave_AllLanesWriteSameAddr 63.5 571/770 Test #571: RaceDetector.LdsSameWave_AllLanesWriteSameAddr ....................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 572: RaceDetector.LdsCrossWave_IrregularSizesAndOffsets 63.5 572/770 Test #572: RaceDetector.LdsCrossWave_IrregularSizesAndOffsets ................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 573: RaceDetector.Exec_CrossWaveCorrect 63.5 573/770 Test #573: RaceDetector.Exec_CrossWaveCorrect ................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 574: RaceDetector.Exec_CrossWaveOverRetire00 63.5 574/770 Test #574: RaceDetector.Exec_CrossWaveOverRetire00 .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 575: RaceDetector.Exec_CrossWaveOverRetire11 63.5 575/770 Test #575: RaceDetector.Exec_CrossWaveOverRetire11 .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 576: RaceDetector.Exec_CrossWaveUnderRetire30 63.5 576/770 Test #576: RaceDetector.Exec_CrossWaveUnderRetire30 ............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 577: RaceDetector.Exec_CrossWaveUnderRetire22 63.5 577/770 Test #577: RaceDetector.Exec_CrossWaveUnderRetire22 ............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 578: RaceDetector.Exec_CrossWaveMissingBarrier1 63.5 578/770 Test #578: RaceDetector.Exec_CrossWaveMissingBarrier1 ........................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 579: RaceDetector.Exec_CrossWaveMissingBarrier2 63.5 579/770 Test #579: RaceDetector.Exec_CrossWaveMissingBarrier2 ........................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 580: RaceDetector.GlobalStore_CountedByVmcnt 63.5 580/770 Test #580: RaceDetector.GlobalStore_CountedByVmcnt .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 581: RaceDetector.GlobalStore_NoVgprRaceOnSource 63.5 581/770 Test #581: RaceDetector.GlobalStore_NoVgprRaceOnSource .......................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 582: RaceDetector.MultiReg_PartialWaitcnt 63.5 582/770 Test #582: RaceDetector.MultiReg_PartialWaitcnt ................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 583: RaceDetector.MultiReg_NoWaitcnt 63.5 583/770 Test #583: RaceDetector.MultiReg_NoWaitcnt ...................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 584: RaceDetector.MultiReg_TwoLoads_PartialDrain 63.5 584/770 Test #584: RaceDetector.MultiReg_TwoLoads_PartialDrain .......................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 585: RaceDetector.Dtl_MultiLane_CrossWaveRace 63.5 585/770 Test #585: RaceDetector.Dtl_MultiLane_CrossWaveRace ............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 586: RaceDetector.Dtl_MultiLane_CrossWaveSafeWithBarrier 63.5 586/770 Test #586: RaceDetector.Dtl_MultiLane_CrossWaveSafeWithBarrier .................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 587: RaceDetector.DualOffset_Race 63.5 587/770 Test #587: RaceDetector.DualOffset_Race ......................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 588: RaceDetector.CheckVgprReadAllLanes 63.5 588/770 Test #588: RaceDetector.CheckVgprReadAllLanes ................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 589: RaceDetector.Mixed_VmcntAndLgkmcnt 63.5 589/770 Test #589: RaceDetector.Mixed_VmcntAndLgkmcnt ................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 590: RaceDetector.Mixed_LgkmcntAndVmcnt 63.5 590/770 Test #590: RaceDetector.Mixed_LgkmcntAndVmcnt ................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 591: RaceDetector.Mixed_BothCleared 63.5 591/770 Test #591: RaceDetector.Mixed_BothCleared ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.5 Start 592: RaceDetector.EventRegistry_NarrowWindow 63.5 592/770 Test #592: RaceDetector.EventRegistry_NarrowWindow .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.5 Start 593: RaceDetector.EventRegistry_TrimWithoutBarrier 63.5 593/770 Test #593: RaceDetector.EventRegistry_TrimWithoutBarrier ........................................................................................................................................................................................................................................................ Passed 0.00 sec 63.5 Start 594: RaceDetector.EventRegistry_TrimWithBarrier 63.6 594/770 Test #594: RaceDetector.EventRegistry_TrimWithBarrier ........................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 595: RaceDetector.HandlerFiresPerLane 63.6 595/770 Test #595: RaceDetector.HandlerFiresPerLane ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 596: RaceDetector.HandlerFiresPerRegister 63.6 596/770 Test #596: RaceDetector.HandlerFiresPerRegister ................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.6 Start 597: RaceDetector.MultipleDistinctRaces 63.6 597/770 Test #597: RaceDetector.MultipleDistinctRaces ................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 598: RaceDetector.RepeatedCheckSameRace 63.6 598/770 Test #598: RaceDetector.RepeatedCheckSameRace ................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 599: IntervalSet.EmptyByDefault 63.6 599/770 Test #599: IntervalSet.EmptyByDefault ........................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 600: IntervalSet.SingleAppend 63.6 600/770 Test #600: IntervalSet.SingleAppend ............................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.6 Start 601: IntervalSet.AdjacentAppendMerges 63.6 601/770 Test #601: IntervalSet.AdjacentAppendMerges ..................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 602: IntervalSet.OverlappingAppendMerges 63.6 602/770 Test #602: IntervalSet.OverlappingAppendMerges .................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.6 Start 603: IntervalSet.NonAdjacentAppendDoesNotMerge 63.6 603/770 Test #603: IntervalSet.NonAdjacentAppendDoesNotMerge ............................................................................................................................................................................................................................................................ Passed 0.00 sec 63.6 Start 604: IntervalSet.OverlappingAppendMergesWithBack 63.6 604/770 Test #604: IntervalSet.OverlappingAppendMergesWithBack .......................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 605: IntervalSet.FinalizeIdempotent 63.6 605/770 Test #605: IntervalSet.FinalizeIdempotent ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 606: IntervalSet.MonotonicAppendNoFinalizeNeeded 63.6 606/770 Test #606: IntervalSet.MonotonicAppendNoFinalizeNeeded .......................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 607: IntervalSet.StridedNonAdjacentAccess 63.6 607/770 Test #607: IntervalSet.StridedNonAdjacentAccess ................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.6 Start 608: IntervalSet.ReverseAdjacentAppendMerges 63.6 608/770 Test #608: IntervalSet.ReverseAdjacentAppendMerges .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.6 Start 609: IntervalSet.DisjointReverseRequiresFinalize 63.6 609/770 Test #609: IntervalSet.DisjointReverseRequiresFinalize .......................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 610: IntervalSet.ContainsAfterFinalize 63.6 610/770 Test #610: IntervalSet.ContainsAfterFinalize .................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 611: IntervalSet.RangeBasedFor 63.6 611/770 Test #611: IntervalSet.RangeBasedFor ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.6 Start 612: IntervalSet.DuplicateAppend 63.6 612/770 Test #612: IntervalSet.DuplicateAppend .......................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 613: IntervalSet.OverlapsRangeEmpty 63.6 613/770 Test #613: IntervalSet.OverlapsRangeEmpty ....................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 614: IntervalSet.OverlapsRangeExactMatch 63.6 614/770 Test #614: IntervalSet.OverlapsRangeExactMatch .................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.6 Start 615: IntervalSet.OverlapsRangePartialOverlap 63.6 615/770 Test #615: IntervalSet.OverlapsRangePartialOverlap .............................................................................................................................................................................................................................................................. Passed 0.00 sec 63.6 Start 616: IntervalSet.OverlapsRangeNoOverlap 63.6 616/770 Test #616: IntervalSet.OverlapsRangeNoOverlap ................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 617: IntervalSet.OverlapsRangeMultipleIntervals 63.6 617/770 Test #617: IntervalSet.OverlapsRangeMultipleIntervals ........................................................................................................................................................................................................................................................... Passed 0.00 sec 63.6 Start 618: IntervalSet.OverlapsRangeSingleByte 63.7 618/770 Test #618: IntervalSet.OverlapsRangeSingleByte .................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 619: Fp4E2M1.ExhaustiveWiden 63.7 619/770 Test #619: Fp4E2M1.ExhaustiveWiden .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 620: Fp4E2M1.RneRoundTrip 63.7 620/770 Test #620: Fp4E2M1.RneRoundTrip ................................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 621: Fp4E2M1.RneEdgeCases 63.7 621/770 Test #621: Fp4E2M1.RneEdgeCases ................................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 622: Fp4E2M1.SrDeterministic 63.7 622/770 Test #622: Fp4E2M1.SrDeterministic .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 623: Fp6E2M3.ExhaustiveWiden 63.7 623/770 Test #623: Fp6E2M3.ExhaustiveWiden .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 624: Fp6E2M3.RneRoundTrip 63.7 624/770 Test #624: Fp6E2M3.RneRoundTrip ................................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 625: Fp6E2M3.RneEdgeCases 63.7 625/770 Test #625: Fp6E2M3.RneEdgeCases ................................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 626: Fp6E2M3.SrDeterministic 63.7 626/770 Test #626: Fp6E2M3.SrDeterministic .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 627: Fp6E2M3.SrDenormRoundTrip 63.7 627/770 Test #627: Fp6E2M3.SrDenormRoundTrip ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.7 Start 628: Bf6E3M2.ExhaustiveWiden 63.7 628/770 Test #628: Bf6E3M2.ExhaustiveWiden .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 629: Bf6E3M2.RneRoundTrip 63.7 629/770 Test #629: Bf6E3M2.RneRoundTrip ................................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 630: Bf6E3M2.RneEdgeCases 63.7 630/770 Test #630: Bf6E3M2.RneEdgeCases ................................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 631: Bf6E3M2.SrDeterministic 63.7 631/770 Test #631: Bf6E3M2.SrDeterministic .............................................................................................................................................................................................................................................................................. Passed 0.00 sec 63.7 Start 632: Bf6E3M2.SrDenormRoundTrip 63.7 632/770 Test #632: Bf6E3M2.SrDenormRoundTrip ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.7 Start 633: Fp8E4M3.KeyValues 63.7 633/770 Test #633: Fp8E4M3.KeyValues .................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.7 Start 634: Fp8E4M3.RneNarrow 63.7 634/770 Test #634: Fp8E4M3.RneNarrow .................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.7 Start 635: Fp8E4M3.RneExp15 63.7 635/770 Test #635: Fp8E4M3.RneExp15 ..................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.7 Start 636: Fp8E4M3.SrExp15 63.7 636/770 Test #636: Fp8E4M3.SrExp15 ...................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.7 Start 637: Fp8E4M3.SrNarrow 63.7 637/770 Test #637: Fp8E4M3.SrNarrow ..................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.7 Start 638: Fp8E4M3.SrDenormRoundTrip 63.7 638/770 Test #638: Fp8E4M3.SrDenormRoundTrip ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.7 Start 639: Bf8E5M2.KeyValues 63.7 639/770 Test #639: Bf8E5M2.KeyValues .................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.7 Start 640: Bf8E5M2.RneNarrow 63.7 640/770 Test #640: Bf8E5M2.RneNarrow .................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.7 Start 641: Bf8E5M2.SrNarrow 63.8 641/770 Test #641: Bf8E5M2.SrNarrow ..................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.8 Start 642: Bf8E5M2.SrDenormRoundTrip 63.8 642/770 Test #642: Bf8E5M2.SrDenormRoundTrip ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.8 Start 643: Fp16.RoundTrip 63.8 643/770 Test #643: Fp16.RoundTrip ....................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.8 Start 644: Bf16.RoundTrip 63.8 644/770 Test #644: Bf16.RoundTrip ....................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.8 Start 645: Pack6Bit.RoundTrip 63.8 645/770 Test #645: Pack6Bit.RoundTrip ................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.8 Start 646: Pack6Bit.AllOnes 63.8 646/770 Test #646: Pack6Bit.AllOnes ..................................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.8 Start 647: PrngAdvance.KnownSequence 63.8 647/770 Test #647: PrngAdvance.KnownSequence ............................................................................................................................................................................................................................................................................ Passed 0.00 sec 63.8 Start 648: PrngAdvance.ZeroFixedPoint 63.8 648/770 Test #648: PrngAdvance.ZeroFixedPoint ........................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.8 Start 649: PrngAdvance.HighBitSet 63.8 649/770 Test #649: PrngAdvance.HighBitSet ............................................................................................................................................................................................................................................................................... Passed 0.00 sec 63.8 Start 650: DrmInfoLayoutTest.VramTypeHbmMatchesKernelDefine 63.8 650/770 Test #650: DrmInfoLayoutTest.VramTypeHbmMatchesKernelDefine ..................................................................................................................................................................................................................................................... Passed 0.00 sec 63.8 Start 651: DrmInfoLayoutTest.LocalStructSizeDoesNotExceedKernel 63.8 651/770 Test #651: DrmInfoLayoutTest.LocalStructSizeDoesNotExceedKernel ................................................................................................................................................................................................................................................. Passed 0.00 sec 63.8 Start 652: Cdna/IsaTest.RegisterAccess/cdna3 # GetParam() = "cdna3" 63.8 652/770 Test #652: Cdna/IsaTest.RegisterAccess/cdna3 # GetParam() = "cdna3" ............................................................................................................................................................................................................................................ Passed 0.01 sec 63.8 Start 653: Cdna/IsaTest.RegisterAccess/cdna4 # GetParam() = "cdna4" 63.8 653/770 Test #653: Cdna/IsaTest.RegisterAccess/cdna4 # GetParam() = "cdna4" ............................................................................................................................................................................................................................................ Passed 0.01 sec 63.8 Start 654: Cdna/IsaTest.RegisterFileIsolation/cdna3 # GetParam() = "cdna3" 63.8 654/770 Test #654: Cdna/IsaTest.RegisterFileIsolation/cdna3 # GetParam() = "cdna3" ..................................................................................................................................................................................................................................... Passed 0.01 sec 63.8 Start 655: Cdna/IsaTest.RegisterFileIsolation/cdna4 # GetParam() = "cdna4" 63.8 655/770 Test #655: Cdna/IsaTest.RegisterFileIsolation/cdna4 # GetParam() = "cdna4" ..................................................................................................................................................................................................................................... Passed 0.01 sec 63.8 Start 656: Cdna/IsaTest.DispatchAndCapacity/cdna3 # GetParam() = "cdna3" 63.8 656/770 Test #656: Cdna/IsaTest.DispatchAndCapacity/cdna3 # GetParam() = "cdna3" ....................................................................................................................................................................................................................................... Passed 0.01 sec 63.8 Start 657: Cdna/IsaTest.DispatchAndCapacity/cdna4 # GetParam() = "cdna4" 63.8 657/770 Test #657: Cdna/IsaTest.DispatchAndCapacity/cdna4 # GetParam() = "cdna4" ....................................................................................................................................................................................................................................... Passed 0.01 sec 63.8 Start 658: Cdna/IsaTest.VendorSpecificExtKernelDispatch/cdna3 # GetParam() = "cdna3" 63.8 658/770 Test #658: Cdna/IsaTest.VendorSpecificExtKernelDispatch/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................... Passed 0.01 sec 63.8 Start 659: Cdna/IsaTest.VendorSpecificExtKernelDispatch/cdna4 # GetParam() = "cdna4" 63.9 659/770 Test #659: Cdna/IsaTest.VendorSpecificExtKernelDispatch/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 660: Cdna/IsaTest.DispatchCreatesWavefronts/cdna3 # GetParam() = "cdna3" 63.9 660/770 Test #660: Cdna/IsaTest.DispatchCreatesWavefronts/cdna3 # GetParam() = "cdna3" ................................................................................................................................................................................................................................. Passed 0.01 sec 63.9 Start 661: Cdna/IsaTest.DispatchCreatesWavefronts/cdna4 # GetParam() = "cdna4" 63.9 661/770 Test #661: Cdna/IsaTest.DispatchCreatesWavefronts/cdna4 # GetParam() = "cdna4" ................................................................................................................................................................................................................................. Passed 0.01 sec 63.9 Start 662: Cdna/IsaTest.MultipleWavesPerWorkgroup/cdna3 # GetParam() = "cdna3" 63.9 662/770 Test #662: Cdna/IsaTest.MultipleWavesPerWorkgroup/cdna3 # GetParam() = "cdna3" ................................................................................................................................................................................................................................. Passed 0.01 sec 63.9 Start 663: Cdna/IsaTest.MultipleWavesPerWorkgroup/cdna4 # GetParam() = "cdna4" 63.9 663/770 Test #663: Cdna/IsaTest.MultipleWavesPerWorkgroup/cdna4 # GetParam() = "cdna4" ................................................................................................................................................................................................................................. Passed 0.01 sec 63.9 Start 664: Cdna/IsaTest.RunToCompletion/cdna3 # GetParam() = "cdna3" 63.9 664/770 Test #664: Cdna/IsaTest.RunToCompletion/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 665: Cdna/IsaTest.RunToCompletion/cdna4 # GetParam() = "cdna4" 63.9 665/770 Test #665: Cdna/IsaTest.RunToCompletion/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 666: Cdna/IsaTest.StepExecutesAndHalts/cdna3 # GetParam() = "cdna3" 63.9 666/770 Test #666: Cdna/IsaTest.StepExecutesAndHalts/cdna3 # GetParam() = "cdna3" ...................................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 667: Cdna/IsaTest.StepExecutesAndHalts/cdna4 # GetParam() = "cdna4" 63.9 667/770 Test #667: Cdna/IsaTest.StepExecutesAndHalts/cdna4 # GetParam() = "cdna4" ...................................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 668: Cdna/IsaTest.RoundRobinScheduling/cdna3 # GetParam() = "cdna3" 63.9 668/770 Test #668: Cdna/IsaTest.RoundRobinScheduling/cdna3 # GetParam() = "cdna3" ...................................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 669: Cdna/IsaTest.RoundRobinScheduling/cdna4 # GetParam() = "cdna4" 63.9 669/770 Test #669: Cdna/IsaTest.RoundRobinScheduling/cdna4 # GetParam() = "cdna4" ...................................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 670: Cdna/IsaTest.EngineRunsToCompletion/cdna3 # GetParam() = "cdna3" 63.9 670/770 Test #670: Cdna/IsaTest.EngineRunsToCompletion/cdna3 # GetParam() = "cdna3" .................................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 671: Cdna/IsaTest.EngineRunsToCompletion/cdna4 # GetParam() = "cdna4" 63.9 671/770 Test #671: Cdna/IsaTest.EngineRunsToCompletion/cdna4 # GetParam() = "cdna4" .................................................................................................................................................................................................................................... Passed 0.01 sec 63.9 Start 672: Cdna/IsaTest.SMovB32_InlineConst/cdna3 # GetParam() = "cdna3" 64.0 672/770 Test #672: Cdna/IsaTest.SMovB32_InlineConst/cdna3 # GetParam() = "cdna3" ....................................................................................................................................................................................................................................... Passed 0.01 sec 64.0 Start 673: Cdna/IsaTest.SMovB32_InlineConst/cdna4 # GetParam() = "cdna4" 64.0 673/770 Test #673: Cdna/IsaTest.SMovB32_InlineConst/cdna4 # GetParam() = "cdna4" ....................................................................................................................................................................................................................................... Passed 0.01 sec 64.0 Start 674: Cdna/IsaTest.SMovB32_SgprToSgpr/cdna3 # GetParam() = "cdna3" 64.0 674/770 Test #674: Cdna/IsaTest.SMovB32_SgprToSgpr/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.0 Start 675: Cdna/IsaTest.SMovB32_SgprToSgpr/cdna4 # GetParam() = "cdna4" 64.0 675/770 Test #675: Cdna/IsaTest.SMovB32_SgprToSgpr/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.0 Start 676: Cdna/IsaTest.SAddI32_NoOverflow/cdna3 # GetParam() = "cdna3" 64.0 676/770 Test #676: Cdna/IsaTest.SAddI32_NoOverflow/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.0 Start 677: Cdna/IsaTest.SAddI32_NoOverflow/cdna4 # GetParam() = "cdna4" 64.0 677/770 Test #677: Cdna/IsaTest.SAddI32_NoOverflow/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.0 Start 678: Cdna/IsaTest.SAddI32_Overflow/cdna3 # GetParam() = "cdna3" 64.0 678/770 Test #678: Cdna/IsaTest.SAddI32_Overflow/cdna3 # GetParam() = "cdna3" .......................................................................................................................................................................................................................................... Passed 0.01 sec 64.0 Start 679: Cdna/IsaTest.SAddI32_Overflow/cdna4 # GetParam() = "cdna4" 64.0 679/770 Test #679: Cdna/IsaTest.SAddI32_Overflow/cdna4 # GetParam() = "cdna4" .......................................................................................................................................................................................................................................... Passed 0.01 sec 64.0 Start 680: Cdna/IsaTest.SAddU32_Carry/cdna3 # GetParam() = "cdna3" 64.0 680/770 Test #680: Cdna/IsaTest.SAddU32_Carry/cdna3 # GetParam() = "cdna3" ............................................................................................................................................................................................................................................. Passed 0.01 sec 64.0 Start 681: Cdna/IsaTest.SAddU32_Carry/cdna4 # GetParam() = "cdna4" 64.0 681/770 Test #681: Cdna/IsaTest.SAddU32_Carry/cdna4 # GetParam() = "cdna4" ............................................................................................................................................................................................................................................. Passed 0.01 sec 64.0 Start 682: Cdna/IsaTest.SAddU32_NoCarry/cdna3 # GetParam() = "cdna3" 64.0 682/770 Test #682: Cdna/IsaTest.SAddU32_NoCarry/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.0 Start 683: Cdna/IsaTest.SAddU32_NoCarry/cdna4 # GetParam() = "cdna4" 64.0 683/770 Test #683: Cdna/IsaTest.SAddU32_NoCarry/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.0 Start 684: Cdna/IsaTest.SCmpEqI32_Equal/cdna3 # GetParam() = "cdna3" 64.0 684/770 Test #684: Cdna/IsaTest.SCmpEqI32_Equal/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.0 Start 685: Cdna/IsaTest.SCmpEqI32_Equal/cdna4 # GetParam() = "cdna4" 64.0 685/770 Test #685: Cdna/IsaTest.SCmpEqI32_Equal/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.0 Start 686: Cdna/IsaTest.SCmpEqI32_NotEqual/cdna3 # GetParam() = "cdna3" 64.1 686/770 Test #686: Cdna/IsaTest.SCmpEqI32_NotEqual/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.1 Start 687: Cdna/IsaTest.SCmpEqI32_NotEqual/cdna4 # GetParam() = "cdna4" 64.1 687/770 Test #687: Cdna/IsaTest.SCmpEqI32_NotEqual/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.1 Start 688: Cdna/IsaTest.SCmpGtI32/cdna3 # GetParam() = "cdna3" 64.1 688/770 Test #688: Cdna/IsaTest.SCmpGtI32/cdna3 # GetParam() = "cdna3" ................................................................................................................................................................................................................................................. Passed 0.01 sec 64.1 Start 689: Cdna/IsaTest.SCmpGtI32/cdna4 # GetParam() = "cdna4" 64.1 689/770 Test #689: Cdna/IsaTest.SCmpGtI32/cdna4 # GetParam() = "cdna4" ................................................................................................................................................................................................................................................. Passed 0.01 sec 64.1 Start 690: Cdna/IsaTest.SBranch_Forward/cdna3 # GetParam() = "cdna3" 64.1 690/770 Test #690: Cdna/IsaTest.SBranch_Forward/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.1 Start 691: Cdna/IsaTest.SBranch_Forward/cdna4 # GetParam() = "cdna4" 64.1 691/770 Test #691: Cdna/IsaTest.SBranch_Forward/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.1 Start 692: Cdna/IsaTest.SCbranchScc0_Taken/cdna3 # GetParam() = "cdna3" 64.1 692/770 Test #692: Cdna/IsaTest.SCbranchScc0_Taken/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.1 Start 693: Cdna/IsaTest.SCbranchScc0_Taken/cdna4 # GetParam() = "cdna4" 64.1 693/770 Test #693: Cdna/IsaTest.SCbranchScc0_Taken/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.1 Start 694: Cdna/IsaTest.SCbranchScc0_NotTaken/cdna3 # GetParam() = "cdna3" 64.1 694/770 Test #694: Cdna/IsaTest.SCbranchScc0_NotTaken/cdna3 # GetParam() = "cdna3" ..................................................................................................................................................................................................................................... Passed 0.01 sec 64.1 Start 695: Cdna/IsaTest.SCbranchScc0_NotTaken/cdna4 # GetParam() = "cdna4" 64.1 695/770 Test #695: Cdna/IsaTest.SCbranchScc0_NotTaken/cdna4 # GetParam() = "cdna4" ..................................................................................................................................................................................................................................... Passed 0.01 sec 64.1 Start 696: Cdna/IsaTest.SCbranchScc1_Taken/cdna3 # GetParam() = "cdna3" 64.1 696/770 Test #696: Cdna/IsaTest.SCbranchScc1_Taken/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.1 Start 697: Cdna/IsaTest.SCbranchScc1_Taken/cdna4 # GetParam() = "cdna4" 64.1 697/770 Test #697: Cdna/IsaTest.SCbranchScc1_Taken/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................ Passed 0.01 sec 64.1 Start 698: Cdna/IsaTest.SEndpgm_Halts/cdna3 # GetParam() = "cdna3" 64.1 698/770 Test #698: Cdna/IsaTest.SEndpgm_Halts/cdna3 # GetParam() = "cdna3" ............................................................................................................................................................................................................................................. Passed 0.01 sec 64.1 Start 699: Cdna/IsaTest.SEndpgm_Halts/cdna4 # GetParam() = "cdna4" 64.2 699/770 Test #699: Cdna/IsaTest.SEndpgm_Halts/cdna4 # GetParam() = "cdna4" ............................................................................................................................................................................................................................................. Passed 0.01 sec 64.2 Start 700: Cdna/IsaTest.VMovB32_PerLane/cdna3 # GetParam() = "cdna3" 64.2 700/770 Test #700: Cdna/IsaTest.VMovB32_PerLane/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 701: Cdna/IsaTest.VMovB32_PerLane/cdna4 # GetParam() = "cdna4" 64.2 701/770 Test #701: Cdna/IsaTest.VMovB32_PerLane/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 702: Cdna/IsaTest.VAddF32_PerLane/cdna3 # GetParam() = "cdna3" 64.2 702/770 Test #702: Cdna/IsaTest.VAddF32_PerLane/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 703: Cdna/IsaTest.VAddF32_PerLane/cdna4 # GetParam() = "cdna4" 64.2 703/770 Test #703: Cdna/IsaTest.VAddF32_PerLane/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 704: Cdna/IsaTest.VMulF32_PerLane/cdna3 # GetParam() = "cdna3" 64.2 704/770 Test #704: Cdna/IsaTest.VMulF32_PerLane/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 705: Cdna/IsaTest.VMulF32_PerLane/cdna4 # GetParam() = "cdna4" 64.2 705/770 Test #705: Cdna/IsaTest.VMulF32_PerLane/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 706: Cdna/IsaTest.VAddU32_PerLane/cdna3 # GetParam() = "cdna3" 64.2 706/770 Test #706: Cdna/IsaTest.VAddU32_PerLane/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 707: Cdna/IsaTest.VAddU32_PerLane/cdna4 # GetParam() = "cdna4" 64.2 707/770 Test #707: Cdna/IsaTest.VAddU32_PerLane/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 708: Cdna/IsaTest.VCmpEqF32_SetsVCC/cdna3 # GetParam() = "cdna3" 64.2 708/770 Test #708: Cdna/IsaTest.VCmpEqF32_SetsVCC/cdna3 # GetParam() = "cdna3" ......................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 709: Cdna/IsaTest.VCmpEqF32_SetsVCC/cdna4 # GetParam() = "cdna4" 64.2 709/770 Test #709: Cdna/IsaTest.VCmpEqF32_SetsVCC/cdna4 # GetParam() = "cdna4" ......................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 710: Cdna/IsaTest.VCndmaskB32/cdna3 # GetParam() = "cdna3" 64.2 710/770 Test #710: Cdna/IsaTest.VCndmaskB32/cdna3 # GetParam() = "cdna3" ............................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 711: Cdna/IsaTest.VCndmaskB32/cdna4 # GetParam() = "cdna4" 64.2 711/770 Test #711: Cdna/IsaTest.VCndmaskB32/cdna4 # GetParam() = "cdna4" ............................................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 712: Cdna/IsaTest.ExecMask_PreservesInactiveLanes/cdna3 # GetParam() = "cdna3" 64.2 712/770 Test #712: Cdna/IsaTest.ExecMask_PreservesInactiveLanes/cdna3 # GetParam() = "cdna3" ........................................................................................................................................................................................................................... Passed 0.01 sec 64.2 Start 713: Cdna/IsaTest.ExecMask_PreservesInactiveLanes/cdna4 # GetParam() = "cdna4" 64.3 713/770 Test #713: Cdna/IsaTest.ExecMask_PreservesInactiveLanes/cdna4 # GetParam() = "cdna4" ........................................................................................................................................................................................................................... Passed 0.01 sec 64.3 Start 714: Cdna/IsaTest.MultiInstructionProgram/cdna3 # GetParam() = "cdna3" 64.3 714/770 Test #714: Cdna/IsaTest.MultiInstructionProgram/cdna3 # GetParam() = "cdna3" ................................................................................................................................................................................................................................... Passed 0.01 sec 64.3 Start 715: Cdna/IsaTest.MultiInstructionProgram/cdna4 # GetParam() = "cdna4" 64.3 715/770 Test #715: Cdna/IsaTest.MultiInstructionProgram/cdna4 # GetParam() = "cdna4" ................................................................................................................................................................................................................................... Passed 0.01 sec 64.3 Start 716: Cdna/IsaTest.BranchLoop/cdna3 # GetParam() = "cdna3" 64.3 716/770 Test #716: Cdna/IsaTest.BranchLoop/cdna3 # GetParam() = "cdna3" ................................................................................................................................................................................................................................................ Passed 0.01 sec 64.3 Start 717: Cdna/IsaTest.BranchLoop/cdna4 # GetParam() = "cdna4" 64.3 717/770 Test #717: Cdna/IsaTest.BranchLoop/cdna4 # GetParam() = "cdna4" ................................................................................................................................................................................................................................................ Passed 0.01 sec 64.3 Start 718: Cdna/IsaTest.MfmaF16Accumulation/cdna3 # GetParam() = "cdna3" 64.3 718/770 Test #718: Cdna/IsaTest.MfmaF16Accumulation/cdna3 # GetParam() = "cdna3" ....................................................................................................................................................................................................................................... Passed 0.01 sec 64.3 Start 719: Cdna/IsaTest.MfmaF16Accumulation/cdna4 # GetParam() = "cdna4" 64.3 719/770 Test #719: Cdna/IsaTest.MfmaF16Accumulation/cdna4 # GetParam() = "cdna4" ....................................................................................................................................................................................................................................... Passed 0.01 sec 64.3 Start 720: Cdna/IsaTest.MfmaF16AccumulationPatterned/cdna3 # GetParam() = "cdna3" 64.3 720/770 Test #720: Cdna/IsaTest.MfmaF16AccumulationPatterned/cdna3 # GetParam() = "cdna3" .............................................................................................................................................................................................................................. Passed 0.01 sec 64.3 Start 721: Cdna/IsaTest.MfmaF16AccumulationPatterned/cdna4 # GetParam() = "cdna4" 64.3 721/770 Test #721: Cdna/IsaTest.MfmaF16AccumulationPatterned/cdna4 # GetParam() = "cdna4" .............................................................................................................................................................................................................................. Passed 0.01 sec 64.3 Start 722: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna1_s_nop # GetParam() = 40-byte object <00-00 00-00 00-00 00-00 E4-6B 0F-03 00-00 00-00 00-00 80-BF 00-00 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 DD-7F 00-00> 64.3 722/770 Test #722: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna1_s_nop # GetParam() = 40-byte object <00-00 00-00 00-00 00-00 E4-6B 0F-03 00-00 00-00 00-00 80-BF 00-00 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 DD-7F 00-00> ....................................................................................... Passed 0.00 sec 64.3 Start 723: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna1_s_endpgm # GetParam() = 40-byte object <00-00 00-00 FC-7F 00-00 E4-6B 0F-03 00-00 00-00 00-00 81-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 FC-7F 00-00> 64.3 723/770 Test #723: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna1_s_endpgm # GetParam() = 40-byte object <00-00 00-00 FC-7F 00-00 E4-6B 0F-03 00-00 00-00 00-00 81-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 FC-7F 00-00> .................................................................................... Passed 0.00 sec 64.3 Start 724: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna2_s_nop # GetParam() = 40-byte object <01-00 00-00 DD-7F 00-00 EA-6B 0F-03 00-00 00-00 00-00 80-BF 00-00 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 DD-7F 00-00> 64.3 724/770 Test #724: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna2_s_nop # GetParam() = 40-byte object <01-00 00-00 DD-7F 00-00 EA-6B 0F-03 00-00 00-00 00-00 80-BF 00-00 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 DD-7F 00-00> ....................................................................................... Passed 0.00 sec 64.3 Start 725: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna2_s_endpgm # GetParam() = 40-byte object <01-00 00-00 00-00 00-00 EA-6B 0F-03 00-00 00-00 00-00 81-BF DD-7F 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 DD-7F 00-00> 64.3 725/770 Test #725: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna2_s_endpgm # GetParam() = 40-byte object <01-00 00-00 00-00 00-00 EA-6B 0F-03 00-00 00-00 00-00 81-BF DD-7F 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 DD-7F 00-00> .................................................................................... Passed 0.00 sec 64.3 Start 726: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna3_s_nop # GetParam() = 40-byte object <02-00 00-00 DD-7F 00-00 F0-6B 0F-03 00-00 00-00 00-00 80-BF FC-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 FC-7F 00-00> 64.3 726/770 Test #726: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna3_s_nop # GetParam() = 40-byte object <02-00 00-00 DD-7F 00-00 F0-6B 0F-03 00-00 00-00 00-00 80-BF FC-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 FC-7F 00-00> ....................................................................................... Passed 0.00 sec 64.3 Start 727: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna3_s_endpgm # GetParam() = 40-byte object <02-00 00-00 DD-7F 00-00 F0-6B 0F-03 00-00 00-00 00-00 81-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> 64.3 727/770 Test #727: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna3_s_endpgm # GetParam() = 40-byte object <02-00 00-00 DD-7F 00-00 F0-6B 0F-03 00-00 00-00 00-00 81-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> .................................................................................... Passed 0.00 sec 64.3 Start 728: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna4_s_nop # GetParam() = 40-byte object <03-00 00-00 DD-7F 00-00 F6-6B 0F-03 00-00 00-00 00-00 80-BF FC-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 DD-7F 00-00> 64.3 728/770 Test #728: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna4_s_nop # GetParam() = 40-byte object <03-00 00-00 DD-7F 00-00 F6-6B 0F-03 00-00 00-00 00-00 80-BF FC-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 DD-7F 00-00> ....................................................................................... Passed 0.00 sec 64.3 Start 729: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna4_s_endpgm # GetParam() = 40-byte object <03-00 00-00 00-00 00-00 F6-6B 0F-03 00-00 00-00 00-00 81-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 729/770 Test #729: AllIsas/DecoderSmokeTest.DecodesCorrectly/cdna4_s_endpgm # GetParam() = 40-byte object <03-00 00-00 00-00 00-00 F6-6B 0F-03 00-00 00-00 00-00 81-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> .................................................................................... Passed 0.00 sec 64.4 Start 730: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna1_s_nop # GetParam() = 40-byte object <04-00 00-00 FC-7F 00-00 FC-6B 0F-03 00-00 00-00 00-00 80-BF DD-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 730/770 Test #730: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna1_s_nop # GetParam() = 40-byte object <04-00 00-00 FC-7F 00-00 FC-6B 0F-03 00-00 00-00 00-00 80-BF DD-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 00-00 00-00> ....................................................................................... Passed 0.00 sec 64.4 Start 731: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna1_s_endpgm # GetParam() = 40-byte object <04-00 00-00 DD-7F 00-00 FC-6B 0F-03 00-00 00-00 00-00 81-BF DD-7F 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 731/770 Test #731: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna1_s_endpgm # GetParam() = 40-byte object <04-00 00-00 DD-7F 00-00 FC-6B 0F-03 00-00 00-00 00-00 81-BF DD-7F 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> .................................................................................... Passed 0.00 sec 64.4 Start 732: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna2_s_nop # GetParam() = 40-byte object <05-00 00-00 00-00 00-00 02-6C 0F-03 00-00 00-00 00-00 80-BF DD-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 FC-7F 00-00> 64.4 732/770 Test #732: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna2_s_nop # GetParam() = 40-byte object <05-00 00-00 00-00 00-00 02-6C 0F-03 00-00 00-00 00-00 80-BF DD-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 FC-7F 00-00> ....................................................................................... Passed 0.00 sec 64.4 Start 733: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna2_s_endpgm # GetParam() = 40-byte object <05-00 00-00 DD-7F 00-00 02-6C 0F-03 00-00 00-00 00-00 81-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 733/770 Test #733: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna2_s_endpgm # GetParam() = 40-byte object <05-00 00-00 DD-7F 00-00 02-6C 0F-03 00-00 00-00 00-00 81-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> .................................................................................... Passed 0.00 sec 64.4 Start 734: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna3_s_nop # GetParam() = 40-byte object <06-00 00-00 00-00 00-00 08-6C 0F-03 00-00 00-00 00-00 80-BF DD-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 734/770 Test #734: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna3_s_nop # GetParam() = 40-byte object <06-00 00-00 00-00 00-00 08-6C 0F-03 00-00 00-00 00-00 80-BF DD-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 00-00 00-00> ....................................................................................... Passed 0.00 sec 64.4 Start 735: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna3_s_endpgm # GetParam() = 40-byte object <06-00 00-00 00-00 00-00 08-6C 0F-03 00-00 00-00 00-00 B0-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 735/770 Test #735: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna3_s_endpgm # GetParam() = 40-byte object <06-00 00-00 00-00 00-00 08-6C 0F-03 00-00 00-00 00-00 B0-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> .................................................................................... Passed 0.00 sec 64.4 Start 736: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna3_5_s_nop # GetParam() = 40-byte object <07-00 00-00 FC-7F 00-00 0E-6C 0F-03 00-00 00-00 00-00 80-BF FC-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 FC-7F 00-00> 64.4 736/770 Test #736: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna3_5_s_nop # GetParam() = 40-byte object <07-00 00-00 FC-7F 00-00 0E-6C 0F-03 00-00 00-00 00-00 80-BF FC-7F 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 FC-7F 00-00> ..................................................................................... Passed 0.00 sec 64.4 Start 737: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna3_5_s_endpgm # GetParam() = 40-byte object <07-00 00-00 00-00 00-00 0E-6C 0F-03 00-00 00-00 00-00 B0-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 FC-7F 00-00> 64.4 737/770 Test #737: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna3_5_s_endpgm # GetParam() = 40-byte object <07-00 00-00 00-00 00-00 0E-6C 0F-03 00-00 00-00 00-00 B0-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 FC-7F 00-00> .................................................................................. Passed 0.00 sec 64.4 Start 738: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna4_s_nop # GetParam() = 40-byte object <08-00 00-00 FC-7F 00-00 1E-6C 0F-03 00-00 00-00 00-00 80-BF 2F-49 73-61 1F-E7 FF-02 00-00 00-00 04-00 00-00 FC-7F 00-00> 64.4 738/770 Test #738: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna4_s_nop # GetParam() = 40-byte object <08-00 00-00 FC-7F 00-00 1E-6C 0F-03 00-00 00-00 00-00 80-BF 2F-49 73-61 1F-E7 FF-02 00-00 00-00 04-00 00-00 FC-7F 00-00> ....................................................................................... Passed 0.00 sec 64.4 Start 739: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna4_s_endpgm # GetParam() = 40-byte object <08-00 00-00 81-09 25-2B 1E-6C 0F-03 00-00 00-00 00-00 B0-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 739/770 Test #739: AllIsas/DecoderSmokeTest.DecodesCorrectly/rdna4_s_endpgm # GetParam() = 40-byte object <08-00 00-00 81-09 25-2B 1E-6C 0F-03 00-00 00-00 00-00 B0-BF 00-00 00-00 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> .................................................................................... Passed 0.00 sec 64.4 Start 740: AllIsas/DecoderSmokeTest.DecodesCorrectly/gfx1250_s_nop # GetParam() = 40-byte object <0B-00 00-00 00-00 00-00 A4-21 F4-02 00-00 00-00 00-00 80-BF 00-00 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 740/770 Test #740: AllIsas/DecoderSmokeTest.DecodesCorrectly/gfx1250_s_nop # GetParam() = 40-byte object <0B-00 00-00 00-00 00-00 A4-21 F4-02 00-00 00-00 00-00 80-BF 00-00 00-00 1F-E7 FF-02 00-00 00-00 04-00 00-00 00-00 00-00> ..................................................................................... Passed 0.00 sec 64.4 Start 741: AllIsas/DecoderSmokeTest.DecodesCorrectly/gfx1250_s_endpgm # GetParam() = 40-byte object <0B-00 00-00 00-00 00-00 A4-21 F4-02 00-00 00-00 00-00 B0-BF 81-09 25-2B 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> 64.4 741/770 Test #741: AllIsas/DecoderSmokeTest.DecodesCorrectly/gfx1250_s_endpgm # GetParam() = 40-byte object <0B-00 00-00 00-00 00-00 A4-21 F4-02 00-00 00-00 00-00 B0-BF 81-09 25-2B 20-B9 00-03 00-00 00-00 04-00 00-00 00-00 00-00> .................................................................................. Passed 0.00 sec 64.4 Start 742: MubufLds/MubufLdsModifierTest.LdsModifierInDisassembly/cdna4_without_lds # GetParam() = 32-byte object <03-00 00-00 00-00 00-00 F6-6B 0F-03 00-00 00-00 00-00 50-E0 00-00 00-00 00-EE 90-25 00-00 00-00> 64.4 742/770 Test #742: MubufLds/MubufLdsModifierTest.LdsModifierInDisassembly/cdna4_without_lds # GetParam() = 32-byte object <03-00 00-00 00-00 00-00 F6-6B 0F-03 00-00 00-00 00-00 50-E0 00-00 00-00 00-EE 90-25 00-00 00-00> ............................................................................................ Passed 0.00 sec 64.4 Start 743: MubufLds/MubufLdsModifierTest.LdsModifierInDisassembly/cdna4_with_lds # GetParam() = 32-byte object <03-00 00-00 00-00 00-00 F6-6B 0F-03 00-00 00-00 00-00 51-E0 00-00 00-00 01-54 CC-02 00-00 00-00> 64.4 743/770 Test #743: MubufLds/MubufLdsModifierTest.LdsModifierInDisassembly/cdna4_with_lds # GetParam() = 32-byte object <03-00 00-00 00-00 00-00 F6-6B 0F-03 00-00 00-00 00-00 51-E0 00-00 00-00 01-54 CC-02 00-00 00-00> ............................................................................................... Passed 0.00 sec 64.4 Start 744: MubufLds/MubufLdsModifierTest.LdsModifierInDisassembly/cdna1_without_lds # GetParam() = 32-byte object <00-00 00-00 00-00 00-00 E4-6B 0F-03 00-00 00-00 00-00 50-E0 00-00 00-00 00-AC AD-29 81-09 25-2B> 64.4 744/770 Test #744: MubufLds/MubufLdsModifierTest.LdsModifierInDisassembly/cdna1_without_lds # GetParam() = 32-byte object <00-00 00-00 00-00 00-00 E4-6B 0F-03 00-00 00-00 00-00 50-E0 00-00 00-00 00-AC AD-29 81-09 25-2B> ............................................................................................ Passed 0.00 sec 64.4 Start 745: MubufLds/MubufLdsModifierTest.LdsModifierInDisassembly/cdna1_with_lds # GetParam() = 32-byte object <00-00 00-00 FC-7F 00-00 E4-6B 0F-03 00-00 00-00 00-00 51-E0 00-00 00-00 01-EE 90-25 00-00 00-00> 64.4 745/770 Test #745: MubufLds/MubufLdsModifierTest.LdsModifierInDisassembly/cdna1_with_lds # GetParam() = 32-byte object <00-00 00-00 FC-7F 00-00 E4-6B 0F-03 00-00 00-00 00-00 51-E0 00-00 00-00 01-EE 90-25 00-00 00-00> ............................................................................................... Passed 0.00 sec 64.4 Start 746: AllIsas/CuFactoryTest.CreatesSuccessfully/0 64.4 746/770 Test #746: AllIsas/CuFactoryTest.CreatesSuccessfully/0 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.4 Start 747: AllIsas/CuFactoryTest.CreatesSuccessfully/1 64.4 747/770 Test #747: AllIsas/CuFactoryTest.CreatesSuccessfully/1 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.4 Start 748: AllIsas/CuFactoryTest.CreatesSuccessfully/2 64.4 748/770 Test #748: AllIsas/CuFactoryTest.CreatesSuccessfully/2 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.4 Start 749: AllIsas/CuFactoryTest.CreatesSuccessfully/3 64.4 749/770 Test #749: AllIsas/CuFactoryTest.CreatesSuccessfully/3 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.4 Start 750: AllIsas/CuFactoryTest.CreatesSuccessfully/11 64.4 750/770 Test #750: AllIsas/CuFactoryTest.CreatesSuccessfully/11 ......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.4 Start 751: AllIsas/CuFactoryTest.CreatesSuccessfully/4 64.5 751/770 Test #751: AllIsas/CuFactoryTest.CreatesSuccessfully/4 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.5 Start 752: AllIsas/CuFactoryTest.CreatesSuccessfully/5 64.5 752/770 Test #752: AllIsas/CuFactoryTest.CreatesSuccessfully/5 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.5 Start 753: AllIsas/CuFactoryTest.CreatesSuccessfully/6 64.5 753/770 Test #753: AllIsas/CuFactoryTest.CreatesSuccessfully/6 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.5 Start 754: AllIsas/CuFactoryTest.CreatesSuccessfully/7 64.5 754/770 Test #754: AllIsas/CuFactoryTest.CreatesSuccessfully/7 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.5 Start 755: AllIsas/CuFactoryTest.CreatesSuccessfully/8 64.5 755/770 Test #755: AllIsas/CuFactoryTest.CreatesSuccessfully/8 .......................................................................................................................................................................................................................................................... Passed 0.01 sec 64.5 Start 756: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VBitop3B16 # GetParam() = 48-byte object <73-45 11-03 00-00 00-00 A4-01 33-02 08-03 33-D2 09-15 2E-DC 00-00 00-00 D0-1C 92-25 00-00 00-00 80-1D 92-25 00-00 00-00 80-1D 92-25 00-00 00-00> 64.5 756/770 Test #756: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VBitop3B16 # GetParam() = 48-byte object <73-45 11-03 00-00 00-00 A4-01 33-02 08-03 33-D2 09-15 2E-DC 00-00 00-00 D0-1C 92-25 00-00 00-00 80-1D 92-25 00-00 00-00 80-1D 92-25 00-00 00-00> ..................... Passed 0.00 sec 64.5 Start 757: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VBitop3B32 # GetParam() = 48-byte object <7E-45 11-03 00-00 00-00 A4-01 34-02 10-03 34-D2 11-25 4E-DC 00-00 00-00 60-A0 91-25 00-00 00-00 F0-A0 91-25 00-00 00-00 F0-A0 91-25 00-00 00-00> 64.5 757/770 Test #757: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VBitop3B32 # GetParam() = 48-byte object <7E-45 11-03 00-00 00-00 A4-01 34-02 10-03 34-D2 11-25 4E-DC 00-00 00-00 60-A0 91-25 00-00 00-00 F0-A0 91-25 00-00 00-00 F0-A0 91-25 00-00 00-00> ..................... Passed 0.00 sec 64.5 Start 758: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VCvtPkF16F32 # GetParam() = 48-byte object <89-45 11-03 00-00 00-00 A4-01 67-02 00-00 67-D2 01-05 02-00 00-00 00-00 F0-32 92-25 00-00 00-00 40-33 92-25 00-00 00-00 40-33 92-25 00-00 00-00> 64.5 758/770 Test #758: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VCvtPkF16F32 # GetParam() = 48-byte object <89-45 11-03 00-00 00-00 A4-01 67-02 00-00 67-D2 01-05 02-00 00-00 00-00 F0-32 92-25 00-00 00-00 40-33 92-25 00-00 00-00 40-33 92-25 00-00 00-00> ................... Passed 0.00 sec 64.5 Start 759: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VPermlane32SwapB32E32 # GetParam() = 48-byte object <96-45 11-03 00-00 00-00 FC-00 5A-00 01-B5 00-7E 00-00 00-00 00-00 00-00 80-21 92-25 00-00 00-00 A0-22 92-25 00-00 00-00 A0-22 92-25 00-00 00-00> 64.5 759/770 Test #759: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VPermlane32SwapB32E32 # GetParam() = 48-byte object <96-45 11-03 00-00 00-00 FC-00 5A-00 01-B5 00-7E 00-00 00-00 00-00 00-00 80-21 92-25 00-00 00-00 A0-22 92-25 00-00 00-00 A0-22 92-25 00-00 00-00> .......... Passed 0.00 sec 64.5 Start 760: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VPermlane32SwapB32E32Hi1 # GetParam() = 48-byte object 64.5 760/770 Test #760: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VPermlane32SwapB32E32Hi1 # GetParam() = 48-byte object ....... Passed 0.00 sec 64.5 Start 761: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VPermlane32SwapB32E32Hi2 # GetParam() = 48-byte object 64.5 761/770 Test #761: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VPermlane32SwapB32E32Hi2 # GetParam() = 48-byte object ....... Passed 0.00 sec 64.5 Start 762: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VPermlane32SwapB32E32Hi3 # GetParam() = 48-byte object 64.5 762/770 Test #762: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/VPermlane32SwapB32E32Hi3 # GetParam() = 48-byte object ....... Passed 0.00 sec 64.5 Start 763: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/MfmaF32_16x16x32F16 # GetParam() = 48-byte object 64.5 763/770 Test #763: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/MfmaF32_16x16x32F16 # GetParam() = 48-byte object ............ Passed 0.00 sec 64.5 Start 764: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/MfmaF32_32x32x16F16 # GetParam() = 48-byte object <0B-46 11-03 00-00 00-00 A7-01 55-00 00-80 D5-D3 00-09 02-02 00-00 00-00 20-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00> 64.5 764/770 Test #764: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/MfmaF32_32x32x16F16 # GetParam() = 48-byte object <0B-46 11-03 00-00 00-00 A7-01 55-00 00-80 D5-D3 00-09 02-02 00-00 00-00 20-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00> ............ Passed 0.00 sec 64.5 Start 765: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/MfmaF32_16x16x32F16AccumVgpr # GetParam() = 48-byte object <1F-46 11-03 00-00 00-00 A7-01 54-00 00-80 D4-D3 00-09 42-04 00-00 00-00 20-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00> 64.5 765/770 Test #765: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/MfmaF32_16x16x32F16AccumVgpr # GetParam() = 48-byte object <1F-46 11-03 00-00 00-00 A7-01 54-00 00-80 D4-D3 00-09 42-04 00-00 00-00 20-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00> ... Passed 0.00 sec 64.5 Start 766: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/MfmaF32_32x32x16F16AccumVgpr # GetParam() = 48-byte object <3C-46 11-03 00-00 00-00 A7-01 55-00 00-80 D5-D3 00-09 42-04 00-00 00-00 20-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00> 64.5 766/770 Test #766: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/MfmaF32_32x32x16F16AccumVgpr # GetParam() = 48-byte object <3C-46 11-03 00-00 00-00 A7-01 55-00 00-80 D5-D3 00-09 42-04 00-00 00-00 20-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00 50-47 92-25 00-00 00-00> ... Passed 0.00 sec 64.5 Start 767: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/DsReadB64TrB16 # GetParam() = 48-byte object <59-46 11-03 00-00 00-00 B3-01 E3-00 00-00 C6-D9 02-00 00-00 00-00 00-00 B0-22 92-25 00-00 00-00 80-25 92-25 00-00 00-00 80-25 92-25 00-00 00-00> 64.5 767/770 Test #767: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/DsReadB64TrB16 # GetParam() = 48-byte object <59-46 11-03 00-00 00-00 B3-01 E3-00 00-00 C6-D9 02-00 00-00 00-00 00-00 B0-22 92-25 00-00 00-00 80-25 92-25 00-00 00-00 80-25 92-25 00-00 00-00> ................. Passed 0.00 sec 64.5 Start 768: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/BufferLoadDwordx3Lds # GetParam() = 48-byte object <68-46 11-03 00-00 00-00 C0-01 16-00 00-10 59-E0 02-00 04-00 00-00 00-00 70-26 92-25 00-00 00-00 40-27 92-25 00-00 00-00 40-27 92-25 00-00 00-00> 64.5 768/770 Test #768: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/BufferLoadDwordx3Lds # GetParam() = 48-byte object <68-46 11-03 00-00 00-00 C0-01 16-00 00-10 59-E0 02-00 04-00 00-00 00-00 70-26 92-25 00-00 00-00 40-27 92-25 00-00 00-00 40-27 92-25 00-00 00-00> ........... Passed 0.00 sec 64.5 Start 769: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/BufferLoadDwordx4Lds # GetParam() = 48-byte object <7D-46 11-03 00-00 00-00 C0-01 17-00 00-10 5D-E0 02-00 04-00 00-00 00-00 70-26 92-25 00-00 00-00 40-27 92-25 00-00 00-00 40-27 92-25 00-00 00-00> 64.5 769/770 Test #769: ImplementedRules/Cdna4ToCdna3SemanticRuleTranslationTest.TranslatesSingleInstruction/BufferLoadDwordx4Lds # GetParam() = 48-byte object <7D-46 11-03 00-00 00-00 C0-01 17-00 00-10 5D-E0 02-00 04-00 00-00 00-00 70-26 92-25 00-00 00-00 40-27 92-25 00-00 00-00 40-27 92-25 00-00 00-00> ........... Passed 0.00 sec 64.5 Start 770: RjDbtTranslate.Smoke 64.6 770/770 Test #770: RjDbtTranslate.Smoke ................................................................................................................................................................................................................................................................................. Passed 0.01 sec 64.6 64.6 99% tests passed, 2 tests failed out of 770 64.6 64.6 Total Test time (real) = 64.55 sec 64.6 64.6 The following tests did not run: 64.6 39 - Gfx1250CodeObjectTest.LlvmMcObjectMapsToTarget (Skipped) 64.6 79 - Gfx1250RealKernelTest.VectorAddLoadsAndDecodes (Skipped) 64.6 80 - Gfx1250RealKernelTest.MatmulNaiveLoadsAndDecodes (Skipped) 64.6 81 - Gfx1250RealKernelTest.VectorAddExecutesGolden (Skipped) 64.6 82 - Gfx1250RealKernelTest.MatmulNaiveExecutesGolden (Skipped) 64.6 64.6 The following tests FAILED: 64.6 417 - Vop1SimdCorrectness.FullExecMask (Failed) 64.6 418 - Vop1SimdCorrectness.PartialExecMask (Failed) 64.6 Errors while running CTest END 1781485312.8892112 64.5556755065918 8